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#Copyright (c) 2016 Intel Corporation
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#      http://www.apache.org/licenses/LICENSE-2.0
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# ====     ====  =========               ==========    ==============
#                                        default
# name     type  bit-width               visibility    behavior
# ====     ====  =========               ==========    ==============
REXRR      SCALAR xed_bits_t 1           SUPPRESSED    NOPRINT INTERNAL DO EO
VEXDEST4   SCALAR xed_bits_t 1           SUPPRESSED    NOPRINT INTERNAL DO EO

# bit3 of the immediate field used as high bit of register source
ESRC3      SCALAR xed_bits_t 1           SUPPRESSED    NOPRINT INTERNAL DO EO
MASK       SCALAR xed_bits_t 3           SUPPRESSED    NOPRINT INTERNAL DO EO

ROUNDC        SCALAR xed_bits_t  3       SUPPRESSED NOPRINT INTERNAL DO EO
SAE           SCALAR xed_bits_t  1       SUPPRESSED NOPRINT INTERNAL DO EO

UBIT   SCALAR        xed_bits_t  1 SUPPRESSED NOPRINT INTERNAL DO EO

# for the loadunpack and pack store instructions where 
# we do not scale displacement by the number of elements..
NO_SCALE_DISP8 SCALAR xed_bits_t 1       SUPPRESSED NOPRINT INTERNAL DO EO

