diff --git a/datafiles/amdxop/amd-xop-isa.txt b/datafiles/amdxop/amd-xop-isa.txt
index d018d43..66f4a0d 100644
--- a/datafiles/amdxop/amd-xop-isa.txt
+++ b/datafiles/amdxop/amd-xop-isa.txt
@@ -935,10 +935,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-0 pf-u af-u zf-mod sf-u of-0 ]
 
-PATTERN: XOPV 0x10 VNP W0 VL128 NOVSR XMAPA MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM32()
+PATTERN: XOPV 0x10 VNP not64 VL128 NOVSR XMAPA MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM32()
+OPERANDS: REG0=GPR32_R():w:d MEM0:r:d IMM0:r:d
+PATTERN: XOPV 0x10 VNP mode64  VL128 NOVSR XMAPA MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM32()
 OPERANDS: REG0=GPRy_R():w:y MEM0:r:y IMM0:r:d
 
-PATTERN: XOPV 0x10 VNP W0 VL128 NOVSR XMAPA MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM32()
+PATTERN: XOPV 0x10 VNP not64 VL128 NOVSR XMAPA MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM32()
+OPERANDS: REG0=GPR32_R():w:d REG1=GPR32_B():r:d IMM0:r:d
+PATTERN: XOPV 0x10 VNP mode64 VL128 NOVSR XMAPA MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM32()
 OPERANDS: REG0=GPRy_R():w:y REG1=GPRy_B():r:y IMM0:r:d
 }
 
@@ -950,10 +954,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-mod pf-u af-u zf-mod sf-mod of-0 ]
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM()
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM()
+OPERANDS: REG0=VGPR32_N():w:d MEM0:r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM()
 OPERANDS: REG0=VGPRy_N():w:y MEM0:r:y
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b001] RM[nnn]
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b001] RM[nnn]
+OPERANDS: REG0=VGPR32_N():w:d REG1=GPR32_B():r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b001] RM[nnn]
 OPERANDS: REG0=VGPRy_N():w:y REG1=GPRv_B():r:y
 }
 
@@ -965,10 +973,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-mod pf-u af-u zf-mod sf-mod of-0 ]
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM()
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM()
+OPERANDS: REG0=VGPR32_N():w:d MEM0:r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM()
 OPERANDS: REG0=VGPRy_N():w:y MEM0:r:y
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b010] RM[nnn]
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b010] RM[nnn]
+OPERANDS: REG0=VGPR32_N():w:d REG1=GPR32_B():r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b010] RM[nnn]
 OPERANDS: REG0=VGPRy_N():w:y REG1=GPRv_B():r:y
 }
 
@@ -980,10 +992,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-mod pf-u af-u zf-mod sf-mod of-0 ]
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM()
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM()
+OPERANDS: REG0=VGPR32_N():w:d MEM0:r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM()
 OPERANDS: REG0=VGPRy_N():w:y MEM0:r:y
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b011] RM[nnn]
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b011] RM[nnn]
+OPERANDS: REG0=VGPR32_N():w:d REG1=GPR32_B():r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b011] RM[nnn]
 OPERANDS: REG0=VGPRy_N():w:y REG1=GPRv_B():r:y
 }
 
@@ -995,10 +1011,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-mod pf-u af-u zf-mod sf-mod of-0 ]
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM()
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM()
+OPERANDS: REG0=VGPR32_N():w:d MEM0:r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM()
 OPERANDS: REG0=VGPRy_N():w:y MEM0:r:y
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b100] RM[nnn]
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b100] RM[nnn]
+OPERANDS: REG0=VGPR32_N():w:d REG1=GPR32_B():r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b100] RM[nnn]
 OPERANDS: REG0=VGPRy_N():w:y REG1=GPRv_B():r:y
 }
 
@@ -1010,10 +1030,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-mod pf-u af-u zf-mod sf-mod of-0 ]
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM()
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM()
+OPERANDS: REG0=VGPR32_N():w:d MEM0:r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM()
 OPERANDS: REG0=VGPRy_N():w:y MEM0:r:y
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b101] RM[nnn]
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b101] RM[nnn]
+OPERANDS: REG0=VGPR32_N():w:d REG1=GPR32_B():r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b101] RM[nnn]
 OPERANDS: REG0=VGPRy_N():w:y REG1=GPRv_B():r:y
 }
 
@@ -1025,10 +1049,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-mod pf-u af-u zf-mod sf-mod of-0 ]
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM()
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM()
+OPERANDS: REG0=VGPR32_N():w:d MEM0:r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM()
 OPERANDS: REG0=VGPRy_N():w:y MEM0:r:y
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b110] RM[nnn]
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b110] RM[nnn]
+OPERANDS: REG0=VGPR32_N():w:d REG1=GPR32_B():r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b110] RM[nnn]
 OPERANDS: REG0=VGPRy_N():w:y REG1=GPRv_B():r:y
 }
 
@@ -1040,10 +1068,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-mod pf-u af-u zf-mod sf-mod of-0 ]
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM()
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM()
+OPERANDS: REG0=VGPR32_N():w:d MEM0:r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM()
 OPERANDS: REG0=VGPRy_N():w:y MEM0:r:y
 
-PATTERN: XOPV 0x01 VNP W0 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b111] RM[nnn]
+PATTERN: XOPV 0x01 VNP not64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b111] RM[nnn]
+OPERANDS: REG0=VGPR32_N():w:d REG1=GPRv_B():r:d
+PATTERN: XOPV 0x01 VNP mode64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b111] RM[nnn]
 OPERANDS: REG0=VGPRy_N():w:y REG1=GPRv_B():r:y
 }
 
@@ -1055,10 +1087,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-mod pf-u af-u zf-mod sf-mod of-0 ]
 
-PATTERN: XOPV 0x02 VNP W0 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM()
+PATTERN: XOPV 0x02 VNP not64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM()
+OPERANDS: REG0=VGPR32_N():w:d MEM0:r:d
+PATTERN: XOPV 0x02 VNP mode64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM()
 OPERANDS: REG0=VGPRy_N():w:y MEM0:r:y
 
-PATTERN: XOPV 0x02 VNP W0 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b001] RM[nnn]
+PATTERN: XOPV 0x02 VNP not64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b001] RM[nnn]
+OPERANDS: REG0=VGPR32_N():w:d REG1=GPRv_B():r:d
+PATTERN: XOPV 0x02 VNP mode64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b001] RM[nnn]
 OPERANDS: REG0=VGPRy_N():w:y REG1=GPRv_B():r:y
 }
 
@@ -1070,10 +1106,14 @@ ISA_SET: TBM
 EXTENSION: TBM
 FLAGS: MUST [ cf-mod pf-u af-u zf-mod sf-mod of-0 ]
 
-PATTERN: XOPV 0x02 VNP W0 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM()
+PATTERN: XOPV 0x02 VNP not64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM()
+OPERANDS: REG0=VGPR32_N():w:d MEM0:r:d
+PATTERN: XOPV 0x02 VNP mode64 VL128  XMAP9 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM()
 OPERANDS: REG0=VGPRy_N():w:y MEM0:r:y
 
-PATTERN: XOPV 0x02 VNP W0 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b110] RM[nnn]
+PATTERN: XOPV 0x02 VNP not64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b110] RM[nnn]
+OPERANDS: REG0=VGPR32_N():w:d REG1=GPRv_B():r:d
+PATTERN: XOPV 0x02 VNP mode64 VL128  XMAP9 MOD[0b11] MOD=3 REG[0b110] RM[nnn]
 OPERANDS: REG0=VGPRy_N():w:y REG1=GPRv_B():r:y
 }