diff --git a/datafiles/avx512-skx/skx-isa.xed.txt b/datafiles/avx512-skx/skx-isa.xed.txt
index 491c004..1a78b51 100644
--- a/datafiles/avx512-skx/skx-isa.xed.txt
+++ b/datafiles/avx512-skx/skx-isa.xed.txt
@@ -6479,7 +6479,7 @@ REAL_OPCODE: Y
 ATTRIBUTES:  MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED 
 PATTERN:    EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()
 OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK1():r:mskw MEM0:r:vv:f64:TXT=BCASTSTR IMM0:r:b
-IFORM:       VFPCLASSPD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512
+IFORM:       VFPCLASSPD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512_VL128
 }
 
 
@@ -6509,7 +6509,7 @@ REAL_OPCODE: Y
 ATTRIBUTES:  MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED 
 PATTERN:    EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()
 OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK1():r:mskw MEM0:r:vv:f64:TXT=BCASTSTR IMM0:r:b
-IFORM:       VFPCLASSPD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512
+IFORM:       VFPCLASSPD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512_VL256
 }
 
 
@@ -6539,7 +6539,7 @@ REAL_OPCODE: Y
 ATTRIBUTES:  MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED 
 PATTERN:    EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W1  NOEVSR  ZEROING=0 UIMM8()  ESIZE_64_BITS() NELEM_FULL()
 OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK1():r:mskw MEM0:r:vv:f64:TXT=BCASTSTR IMM0:r:b
-IFORM:       VFPCLASSPD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512
+IFORM:       VFPCLASSPD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512_VL512
 }
 
 
@@ -6569,7 +6569,7 @@ REAL_OPCODE: Y
 ATTRIBUTES:  MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED 
 PATTERN:    EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL128  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()
 OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK1():r:mskw MEM0:r:vv:f32:TXT=BCASTSTR IMM0:r:b
-IFORM:       VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512
+IFORM:       VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL128
 }
 
 
@@ -6599,7 +6599,7 @@ REAL_OPCODE: Y
 ATTRIBUTES:  MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED 
 PATTERN:    EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL256  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()
 OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK1():r:mskw MEM0:r:vv:f32:TXT=BCASTSTR IMM0:r:b
-IFORM:       VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512
+IFORM:       VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL256
 }
 
 
@@ -6629,7 +6629,7 @@ REAL_OPCODE: Y
 ATTRIBUTES:  MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED 
 PATTERN:    EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn]  MODRM()  VL512  W0  NOEVSR  ZEROING=0 UIMM8()  ESIZE_32_BITS() NELEM_FULL()
 OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK1():r:mskw MEM0:r:vv:f32:TXT=BCASTSTR IMM0:r:b
-IFORM:       VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512
+IFORM:       VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL512
 }