Mark Charney c31ccf70bd separate AMD cpuid info. add PREFETCHW to silvermont/bdw ...

* adding PREFETCHW to silvermont and broadwell avoids issue with CPUID bit
  referring to non-exising isa-set in --no-amd builds. PREFETCHW
  opcode was previously a NOP on pentium-pro-and-later so no
  chip-check violation.

  * A little bit of a stroke of luck here: the ISA_SET PREFETCHW shows
  up in the isa-set enum and in the chip hierarchy, but there are no
  instructions in the PREFETCHW ISA_SET. The PREFETCHW instruction is
  in the PREFETCH_NOP ISA_SET and is checked for validity that way.

  The only major downside of this approach is that the cpuid bit for
  PREFETCHW is not displayed properly when queried.

Change-Id: Ic20f9dc86d2a43367cc623794b21ce51811f91b0
(cherry picked from commit 2a030ad113265e3b71633c59dc0084d0bf609edd)

2017-05-01 12:16:04 -04:00

..

bdw-chips.txt

separate AMD cpuid info. add PREFETCHW to silvermont/bdw

2017-05-01 12:16:04 -04:00

cpuid.xed.txt

initial commit

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files.cfg

initial commit

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lin2.xed.txt

initial commit

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rdseed.xed.txt

initial commit

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smap.xed.txt

initial commit

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