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archived-xed/datafiles/foo.diff
Mark Charney 92e0e6956c add NONTEMPORAL attribute to relevant instructions 
Change-Id: Ib55fdafbe91f5c1b0fe4601bb9adbf36650f45d4
(cherry picked from commit 789029d55e10b93b762e0dac70fa4b772246fc33)
2017-05-01 12:16:04 -04:00

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diff --git a/datafiles/avx/avx-isa.txt b/datafiles/avx/avx-isa.txt
index 1712753..c92535f 100644
--- a/datafiles/avx/avx-isa.txt
+++ b/datafiles/avx/avx-isa.txt
@@ -1190,7 +1190,7 @@ EXCEPTIONS: avx-type-6
CPL : 3
CATEGORY : AVX
EXTENSION : AVX
-ATTRIBUTES : maskop
+ATTRIBUTES : maskop NONTEMPORAL
# load forms
PATTERN : VV1 0x2C V66 VL128 V0F38 norexw_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : REG0=XMM_R():w:dq:f32 REG1=XMM_N():r:dq MEM0:r:dq:f32
@@ -4271,12 +4271,13 @@ OPERANDS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_XMM0:w
####################################################################################
{
-ICLASS : VMASKMOVDQU
+ICLASS : VMASKMOVDQU
EXCEPTIONS: avx-type-4
CPL : 3
+
CATEGORY : AVX
EXTENSION : AVX
-ATTRIBUTES : maskop fixed_base0 NOTSX
+ATTRIBUTES : maskop fixed_base0 NOTSX NONTEMPORAL
PATTERN : VV1 0xF7 V0F V66 VL128 NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn]
OPERANDS : REG0=XMM_R():r:dq:u8 REG1=XMM_B():r:dq:u8 MEM0:w:SUPP:dq:u8 BASE0=ArDI():r:SUPP SEG0=FINAL_DSEG():r:SUPP
}
@@ -4374,7 +4375,7 @@ EXCEPTIONS: avx-type-1
CPL : 3
CATEGORY : DATAXFER
EXTENSION : AVX
-ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
PATTERN : VV1 0x2A V66 V0F38 VL128 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : REG0=XMM_R():w:dq MEM0:r:dq
@@ -4390,7 +4391,7 @@ EXCEPTIONS: avx-type-1
CPL : 3
CATEGORY : DATAXFER
EXTENSION : AVX
-ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
PATTERN : VV1 0xE7 V66 V0F VL128 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : MEM0:w:dq:i32 REG0=XMM_R():r:dq:i32
@@ -4401,7 +4402,7 @@ EXCEPTIONS: avx-type-1
CPL : 3
CATEGORY : DATAXFER
EXTENSION : AVX
-ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
PATTERN : VV1 0x2B V66 V0F VL128 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : MEM0:w:dq:f64 REG0=XMM_R():r:dq:f64
@@ -4412,7 +4413,7 @@ EXCEPTIONS: avx-type-1
CPL : 3
CATEGORY : DATAXFER
EXTENSION : AVX
-ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
PATTERN : VV1 0x2B VNP V0F VL128 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : MEM0:w:dq:f32 REG0=XMM_R():r:dq:f32
diff --git a/datafiles/avx/avx-movnt-store.txt b/datafiles/avx/avx-movnt-store.txt
index b3febc4..3a0ef1d 100644
--- a/datafiles/avx/avx-movnt-store.txt
+++ b/datafiles/avx/avx-movnt-store.txt
@@ -24,7 +24,7 @@ EXCEPTIONS: avx-type-1
CPL : 3
CATEGORY : DATAXFER
EXTENSION : AVX
-ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
PATTERN : VV1 0xE7 V66 V0F VL256 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : MEM0:w:qq:i32 REG0=YMM_R():r:qq:i32
@@ -35,7 +35,7 @@ EXCEPTIONS: avx-type-1
CPL : 3
CATEGORY : DATAXFER
EXTENSION : AVX
-ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
PATTERN : VV1 0x2B V66 V0F VL256 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : MEM0:w:qq:f64 REG0=YMM_R():r:qq:f64
@@ -46,7 +46,7 @@ EXCEPTIONS: avx-type-1
CPL : 3
CATEGORY : DATAXFER
EXTENSION : AVX
-ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
PATTERN : VV1 0x2B VNP V0F VL256 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : MEM0:w:qq:f32 REG0=YMM_R():r:qq:f32
diff --git a/datafiles/avx512-skx/skx-isa.xed.txt b/datafiles/avx512-skx/skx-isa.xed.txt
index 1a78b51..73cfbb3 100644
--- a/datafiles/avx512-skx/skx-isa.xed.txt
+++ b/datafiles/avx512-skx/skx-isa.xed.txt
@@ -8726,7 +8726,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_128
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()
OPERANDS: MEM0:w:dq:u32 REG0=XMM_R3():r:dq:u32
IFORM: VMOVNTDQ_MEMu32_XMMu32_AVX512
@@ -8742,7 +8742,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_256
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()
OPERANDS: MEM0:w:qq:u32 REG0=YMM_R3():r:qq:u32
IFORM: VMOVNTDQ_MEMu32_YMMu32_AVX512
@@ -8758,7 +8758,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_128
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()
OPERANDS: REG0=XMM_R3():w:dq:u32 MEM0:r:dq:u32
IFORM: VMOVNTDQA_XMMu32_MEMu32_AVX512
@@ -8774,7 +8774,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_256
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()
OPERANDS: REG0=YMM_R3():w:qq:u32 MEM0:r:qq:u32
IFORM: VMOVNTDQA_YMMu32_MEMu32_AVX512
@@ -8790,7 +8790,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_128
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULLMEM()
OPERANDS: MEM0:w:dq:f64 REG0=XMM_R3():r:dq:f64
IFORM: VMOVNTPD_MEMf64_XMMf64_AVX512
@@ -8806,7 +8806,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_256
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULLMEM()
OPERANDS: MEM0:w:qq:f64 REG0=YMM_R3():r:qq:f64
IFORM: VMOVNTPD_MEMf64_YMMf64_AVX512
@@ -8822,7 +8822,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_128
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()
OPERANDS: MEM0:w:dq:f32 REG0=XMM_R3():r:dq:f32
IFORM: VMOVNTPS_MEMf32_XMMf32_AVX512
@@ -8838,7 +8838,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_256
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()
OPERANDS: MEM0:w:qq:f32 REG0=YMM_R3():r:qq:f32
IFORM: VMOVNTPS_MEMf32_YMMf32_AVX512
diff --git a/datafiles/avx512f/avx512-foundation-isa.xed.txt b/datafiles/avx512f/avx512-foundation-isa.xed.txt
index a5d1692..2770678 100644
--- a/datafiles/avx512f/avx512-foundation-isa.xed.txt
+++ b/datafiles/avx512f/avx512-foundation-isa.xed.txt
@@ -7334,7 +7334,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_512
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()
OPERANDS: MEM0:w:zd:u32 REG0=ZMM_R3():r:zu32
IFORM: VMOVNTDQ_MEMu32_ZMMu32_AVX512
@@ -7350,7 +7350,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_512
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()
OPERANDS: REG0=ZMM_R3():w:zu32 MEM0:r:zd:u32
IFORM: VMOVNTDQA_ZMMu32_MEMu32_AVX512
@@ -7366,7 +7366,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_512
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_FULLMEM()
OPERANDS: MEM0:w:zd:f64 REG0=ZMM_R3():r:zf64
IFORM: VMOVNTPD_MEMf64_ZMMf64_AVX512
@@ -7382,7 +7382,7 @@ EXTENSION: AVX512EVEX
ISA_SET: AVX512F_512
EXCEPTIONS: AVX512-E1NF
REAL_OPCODE: Y
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT DISP8_FULLMEM NONTEMPORAL
PATTERN: EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_FULLMEM()
OPERANDS: MEM0:w:zd:f32 REG0=ZMM_R3():r:zf32
IFORM: VMOVNTPS_MEMf32_ZMMf32_AVX512
diff --git a/datafiles/avxhsw/movnt-load-isa.txt b/datafiles/avxhsw/movnt-load-isa.txt
index 8963979..ec0688f 100644
--- a/datafiles/avxhsw/movnt-load-isa.txt
+++ b/datafiles/avxhsw/movnt-load-isa.txt
@@ -24,7 +24,7 @@ CPL : 3
CATEGORY : DATAXFER
EXTENSION : AVX2
EXCEPTIONS: avx-type-1
-ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
PATTERN : VV1 0x2A V66 V0F38 VL256 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : REG0=YMM_R():w:qq MEM0:r:qq
diff --git a/datafiles/xed-amd-sse4a.txt b/datafiles/xed-amd-sse4a.txt
index cbada6c..707a445 100644
--- a/datafiles/xed-amd-sse4a.txt
+++ b/datafiles/xed-amd-sse4a.txt
@@ -54,6 +54,7 @@ ICLASS : MOVNTSD
CPL : 3
CATEGORY : DATAXFER
EXTENSION : SSE4a
+ATTRIBUTES: NONTEMPORAL
PATTERN : 0x0F 0x2B f2_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : MEM0:w:q REG0=XMM_R():r:q
}
@@ -62,6 +63,7 @@ ICLASS : MOVNTSS
CPL : 3
CATEGORY : DATAXFER
EXTENSION : SSE4a
+ATTRIBUTES: NONTEMPORAL
PATTERN : 0x0F 0x2B f3_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : MEM0:w:d REG0=XMM_R():r:d
}
diff --git a/datafiles/xed-isa.txt b/datafiles/xed-isa.txt
index d582516..ebb45b7 100644
--- a/datafiles/xed-isa.txt
+++ b/datafiles/xed-isa.txt
@@ -4505,7 +4505,7 @@ OPERANDS : MEM0:w:d REG0=XED_REG_MXCSR:r:SUPP
ICLASS : PREFETCHNTA
CPL : 3
CATEGORY : PREFETCH
-ATTRIBUTES: PREFETCH
+ATTRIBUTES: PREFETCH NONTEMPORAL
EXTENSION : SSE
ISA_SET : SSE_PREFETCH
PATTERN : 0x0F 0x18 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM()
@@ -10043,7 +10043,7 @@ ICLASS : MOVNTI
CPL : 3
CATEGORY : DATAXFER
EXTENSION : SSE2
-ATTRIBUTES : IGNORES_OSFXSR NOTSX
+ATTRIBUTES : IGNORES_OSFXSR NOTSX NONTEMPORAL
PATTERN : 0x0F 0xC3 no_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] EOSZ!=3 MODRM()
OPERANDS : MEM0:w:d REG0=GPR32_R():r
PATTERN : 0x0F 0xC3 no_refining_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] EOSZ=3 MODRM()
@@ -10535,7 +10535,7 @@ OPERANDS : REG0=MMX_R():rw:q:i16 REG1=MMX_B():r:q:i16
{
ICLASS : MOVNTQ
EXCEPTIONS: mmx-nofp2
-ATTRIBUTES: NOTSX
+ATTRIBUTES: NOTSX NONTEMPORAL
CPL : 3
CATEGORY : DATAXFER
EXTENSION : MMX
@@ -10655,7 +10655,7 @@ OPERANDS : REG0=XMM_R():w:dq:i32 REG1=XMM_B():r:pd:f64
}
{
ICLASS : MOVNTDQ
-ATTRIBUTES: REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES: REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
CPL : 3
CATEGORY : DATAXFER
EXTENSION : SSE2
@@ -10771,7 +10771,7 @@ CPL : 3
CATEGORY : DATAXFER
EXTENSION : MMX
ISA_SET : PENTIUMMMX
-ATTRIBUTES : fixed_base0 maskop NOTSX
+ATTRIBUTES : fixed_base0 maskop NOTSX NONTEMPORAL
PATTERN : 0x0F 0xF7 no_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] OVERRIDE_SEG0()
OPERANDS : REG0=MMX_R():r:q:u8 REG1=MMX_B():r:q:i8 MEM0:w:q:SUPP BASE0=ArDI():r:SUPP SEG0=FINAL_DSEG():r:SUPP
}
@@ -10890,7 +10890,7 @@ CPL : 3
CATEGORY : DATAXFER
EXTENSION : SSE2
EXCEPTIONS: SSE_TYPE_4
-ATTRIBUTES : fixed_base0 maskop NOTSX
+ATTRIBUTES : fixed_base0 maskop NOTSX NONTEMPORAL
PATTERN : 0x0F 0xF7 osz_refining_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] REFINING66() OVERRIDE_SEG0()
OPERANDS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq MEM0:w:dq:SUPP BASE0=ArDI():r:SUPP SEG0=FINAL_DSEG():r:SUPP
}
@@ -10970,7 +10970,7 @@ OPERANDS : REG0=XMM_R():w:q:f32 REG1=MMX_B():r:q:i32
}
{
ICLASS : MOVNTPS
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT NONTEMPORAL
CPL : 3
CATEGORY : DATAXFER
EXTENSION : SSE
@@ -11111,7 +11111,7 @@ OPERANDS : REG0=XMM_R():w:pd:f64 REG1=MMX_B():r:q:i32
}
{
ICLASS : MOVNTPD
-ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT
+ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT NONTEMPORAL
CPL : 3
CATEGORY : DATAXFER
EXTENSION : SSE2
@@ -13907,7 +13907,7 @@ CPL : 3
CATEGORY : SSE
EXTENSION : SSE4
EXCEPTIONS: SSE_TYPE_1
-ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX
+ATTRIBUTES : REQUIRES_ALIGNMENT NOTSX NONTEMPORAL
PATTERN : 0x0F 0x38 0x2A osz_refining_prefix REFINING66() MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
OPERANDS : REG0=XMM_R():w:dq MEM0:r:dq
}
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