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97 lines
2.5 KiB
Plaintext
97 lines
2.5 KiB
Plaintext
#BEGIN_LEGAL
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#
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#Copyright (c) 2016 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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#END_LEGAL
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###########################################################################
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## file: xed-immediates.txt
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###########################################################################
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# Immediates and displacements
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# FIXME: when there are multiple immediates, need separate storage
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# FIXME: record the width of the immediate
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# FIXME: for encode we'll sometimes have to choose between SIMMv and
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# SIMMz to pick a MOV, for 16 and 32b widths.
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##########################################################################################
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## 2-BYTE STORAGE UNITS
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##########################################################################################
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ONE()::
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mode16 | IMM_WIDTH=8 UIMM0=1
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mode32 | IMM_WIDTH=8 UIMM0=1
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mode64 | IMM_WIDTH=8 UIMM0=1
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UIMMv()::
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EOSZ=1 UIMM0[i/16] | IMM_WIDTH=16
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EOSZ=2 UIMM0[i/32] | IMM_WIDTH=32
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EOSZ=3 UIMM0[i/64] | IMM_WIDTH=64
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SIMMz()::
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EOSZ=1 UIMM0[i/16] | IMM_WIDTH=16 IMM0SIGNED=1
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EOSZ=2 UIMM0[i/32] | IMM_WIDTH=32 IMM0SIGNED=1
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EOSZ=3 UIMM0[i/32] | IMM_WIDTH=32 IMM0SIGNED=1
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SIMM8()::
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UIMM0[i/8] | IMM_WIDTH=8 IMM0SIGNED=1
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UIMM8()::
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UIMM0[i/8] | IMM_WIDTH=8
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# For ENTER. separate storage.
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UIMM8_1()::
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UIMM1[i/8] | true
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UIMM16()::
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UIMM0[i/16] | IMM_WIDTH=16
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UIMM32()::
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UIMM0[i/32] | IMM_WIDTH=32
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BRDISP8()::
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DISP[d/8] |BRDISP_WIDTH=8
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BRDISP32()::
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DISP[d/32] | BRDISP_WIDTH=32
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BRDISPz()::
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EOSZ=1 DISP[d/16] | BRDISP_WIDTH=16
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EOSZ=2 DISP[d/32] | BRDISP_WIDTH=32
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EOSZ=3 DISP[d/32] | BRDISP_WIDTH=32
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MEMDISPv()::
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EASZ=1 DISP[a/16] | DISP_WIDTH=16
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EASZ=2 DISP[a/32] | DISP_WIDTH=32
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EASZ=3 DISP[a/64] | DISP_WIDTH=64
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MEMDISP32()::
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DISP[a/32] | DISP_WIDTH=32
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MEMDISP16()::
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DISP[a/16] | DISP_WIDTH=16
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MEMDISP8()::
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DISP[a/8] | DISP_WIDTH=8
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MEMDISP()::
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NEED_MEMDISP=0 | DISP_WIDTH=0
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NEED_MEMDISP=8 DISP[a/8] | DISP_WIDTH=8
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NEED_MEMDISP=16 DISP[a/16] | DISP_WIDTH=16
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NEED_MEMDISP=32 DISP[a/32] | DISP_WIDTH=32
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