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https://github.com/RPCSX/xed.git
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ef83ba6cb1
* Outside of 64b mode, EVEX.R', EVEX.R, EVEX.X and EVEX.B are
ignored. (handled in ILD C code). If not set, those fields are
zero.
* MASK_B ignores REXB (EVEX.B and VEX.B). It is used in EVEX and VEX
mask encodings. SDM(062) states EVEX.B is ignored but omits
mention of VEX.B.
* In 64b mode, VEX.vvvv[3] must be 1 for mask registers; EVEX.vvvv
is not used for mask registers. In non-64b mode VEX.vvvv[3] is
ignored for mask regs.
* VEX.R must be 1 for mask registers.
Change-Id: I209a62c7e27778ca0981e342cb3143f367409abf
(cherry picked from commit c41fb5e8f6b77524b94ee2e5860dd6c91a45b628)
79 lines
2.5 KiB
Plaintext
79 lines
2.5 KiB
Plaintext
#BEGIN_LEGAL
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#
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#Copyright (c) 2016 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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#END_LEGAL
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# FIXME: the rest of this file is common w/KNC. Split it out to avoid
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# duplication
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xed_reg_enum_t MASK1()::
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MASK=0x0 | OUTREG=XED_REG_K0
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MASK=0x1 | OUTREG=XED_REG_K1
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MASK=0x2 | OUTREG=XED_REG_K2
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MASK=0x3 | OUTREG=XED_REG_K3
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MASK=0x4 | OUTREG=XED_REG_K4
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MASK=0x5 | OUTREG=XED_REG_K5
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MASK=0x6 | OUTREG=XED_REG_K6
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MASK=0x7 | OUTREG=XED_REG_K7
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xed_reg_enum_t MASKNOT0()::
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MASK=0x0 | OUTREG=XED_REG_ERROR
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MASK=0x1 | OUTREG=XED_REG_K1
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MASK=0x2 | OUTREG=XED_REG_K2
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MASK=0x3 | OUTREG=XED_REG_K3
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MASK=0x4 | OUTREG=XED_REG_K4
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MASK=0x5 | OUTREG=XED_REG_K5
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MASK=0x6 | OUTREG=XED_REG_K6
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MASK=0x7 | OUTREG=XED_REG_K7
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# used for compares in EVEX
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xed_reg_enum_t MASK_R()::
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REXRR=0 REXR=0 REG=0x0 | OUTREG=XED_REG_K0
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REXRR=0 REXR=0 REG=0x1 | OUTREG=XED_REG_K1
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REXRR=0 REXR=0 REG=0x2 | OUTREG=XED_REG_K2
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REXRR=0 REXR=0 REG=0x3 | OUTREG=XED_REG_K3
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REXRR=0 REXR=0 REG=0x4 | OUTREG=XED_REG_K4
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REXRR=0 REXR=0 REG=0x5 | OUTREG=XED_REG_K5
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REXRR=0 REXR=0 REG=0x6 | OUTREG=XED_REG_K6
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REXRR=0 REXR=0 REG=0x7 | OUTREG=XED_REG_K7
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# MASK_B is used by VEX and EVEX encodings. SDM (rev 062) states in
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# EVEX, EVEX.B (REXB) is ignored. SDM does not (yet) say what happens
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# on VEX.B but assuming it is similar.
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xed_reg_enum_t MASK_B()::
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RM=0x0 | OUTREG=XED_REG_K0
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RM=0x1 | OUTREG=XED_REG_K1
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RM=0x2 | OUTREG=XED_REG_K2
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RM=0x3 | OUTREG=XED_REG_K3
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RM=0x4 | OUTREG=XED_REG_K4
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RM=0x5 | OUTREG=XED_REG_K5
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RM=0x6 | OUTREG=XED_REG_K6
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RM=0x7 | OUTREG=XED_REG_K7
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# only used in VEX space for K-mask ops
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# stored inverted
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xed_reg_enum_t MASK_N()::
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VEXDEST3=1 VEXDEST210=0x0 | OUTREG=XED_REG_K7
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VEXDEST3=1 VEXDEST210=0x1 | OUTREG=XED_REG_K6
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VEXDEST3=1 VEXDEST210=0x2 | OUTREG=XED_REG_K5
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VEXDEST3=1 VEXDEST210=0x3 | OUTREG=XED_REG_K4
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VEXDEST3=1 VEXDEST210=0x4 | OUTREG=XED_REG_K3
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VEXDEST3=1 VEXDEST210=0x5 | OUTREG=XED_REG_K2
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VEXDEST3=1 VEXDEST210=0x6 | OUTREG=XED_REG_K1
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VEXDEST3=1 VEXDEST210=0x7 | OUTREG=XED_REG_K0
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