llvm/test/CodeGen/X86/setcc-narrowing.ll

; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s
; PR17338

@t1.global = internal global i64 -1, align 8

define i32 @t1() nounwind ssp {
entry:
; CHECK-LABEL: t1:
; CHECK: cmpl	$0, _t1.global
; CHECK-NEXT: setne %al
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: ret
  %0 = load i64, i64* @t1.global, align 8
  %and = and i64 4294967295, %0
  %cmp = icmp sgt i64 %and, 0
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}
Add missing check to SETCC optimization. PR17338. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191337 91177308-0d34-0410-b5e6-96231b3b80d8 2013-09-24 22:50:14 +00:00			`; RUN: llc < %s -mtriple=i686-apple-darwin \| FileCheck %s`
			`; PR17338`

			`@t1.global = internal global i64 -1, align 8`

			`define i32 @t1() nounwind ssp {`
			`entry:`
			`; CHECK-LABEL: t1:`
			`; CHECK: cmpl $0, _t1.global`
			`; CHECK-NEXT: setne %al`
			`; CHECK-NEXT: movzbl %al, %eax`
			`; CHECK-NEXT: ret`
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=\|:\|^)\sload (?:atomic )?(?:volatile )?(.?))(\| addrspace\(\d+\) )\($\| (?:%\|@\|null\|undef\|blockaddress\|getelementptr\|addrspacecast\|bitcast\|inttoptr\|\[\[[a-zA-Z]\|\{\{).$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8 2015-02-27 21:17:42 +00:00			`%0 = load i64, i64* @t1.global, align 8`
Add missing check to SETCC optimization. PR17338. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191337 91177308-0d34-0410-b5e6-96231b3b80d8 2013-09-24 22:50:14 +00:00			`%and = and i64 4294967295, %0`
			`%cmp = icmp sgt i64 %and, 0`
			`%conv = zext i1 %cmp to i32`
			`ret i32 %conv`
			`}`