llvm/test/MC/X86/sgx-encoding.s

// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s

// CHECK: encls
// CHECK: encoding: [0x0f,0x01,0xcf]
	encls

// CHECK: enclu
// CHECK: encoding: [0x0f,0x01,0xd7]
	enclu
Add support for the X86 secure guard extensions instructions in assembler (SGX). This allows assembling the two new instructions, encls and enclu for the SKX processor model. Note the diffs are a bigger than what might think, but to fit the new MRM_CF and MRM_D7 in things in the right places things had to be renumbered and shuffled down causing a bit more diffs. rdar://16228228 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214460 91177308-0d34-0410-b5e6-96231b3b80d8 2014-07-31 23:57:38 +00:00			`// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s \| FileCheck %s`

			`// CHECK: encls`
			`// CHECK: encoding: [0x0f,0x01,0xcf]`
			`encls`

			`// CHECK: enclu`
			`// CHECK: encoding: [0x0f,0x01,0xd7]`
			`enclu`