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llvm/lib/Target/AVR/CMakeLists.txt

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Add AVR.td and AVRRegisterInfo.td Summary: This adds the core AVR TableGen file, along with the register descriptions. Lines in AVR.td which require other TableGen files which haven't been committed yet are commented out. This is a fairly trivial patch, and should only require a quick review. I kept the line width smaller than 80 columns, but there are a few exceptions because I'm not sure how to split a string over several lines. Reviewers: stoklund Subscribers: dylanmckay, agnat Differential Revision: http://reviews.llvm.org/D14684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256120 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 12:16:20 +00:00
set(LLVM_TARGET_DEFINITIONS AVR.td)
Add AVR backend skeleton This adds part of the target info code, and adds modifications to the build scripts so that AVR is recognized a supported, experimental backend. It does not include any AVR-specific code, just the bare sources required for a backend to exist. From D14039. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-12 09:26:44 +00:00
[AVR] Add assembly parser Summary: This patch adds the AVRAsmParser library. Reviewers: arsenm, kparzysz Subscribers: wdng, beanz, mgorny, kparzysz, simoncook, jtbandes, llvm-commits Differential Revision: https://reviews.llvm.org/D20046 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282584 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-28 13:02:57 +00:00
tablegen(LLVM AVRGenAsmMatcher.inc -gen-asm-matcher)
[AVR] Generate all of the TableGen files we need This enables generation of all of the TableGen files that are used downstream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285274 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-27 08:20:47 +00:00
tablegen(LLVM AVRGenRegisterInfo.inc -gen-register-info)
tablegen(LLVM AVRGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM AVRGenDisassemblerTables.inc -gen-disassembler)
tablegen(LLVM AVRGenMCCodeEmitter.inc -gen-emitter)
[AVR] Enable generation of the TableGen assembly writer tables This also changes the order of the statements in CMakeLists.txt to be alphabetical. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283711 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-10 01:28:45 +00:00
tablegen(LLVM AVRGenAsmWriter.inc -gen-asm-writer)
[AVR] Generate all of the TableGen files we need This enables generation of all of the TableGen files that are used downstream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285274 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-27 08:20:47 +00:00
tablegen(LLVM AVRGenAsmMatcher.inc -gen-asm-matcher)
tablegen(LLVM AVRGenDAGISel.inc -gen-dag-isel)
[AVR] Added AVRCallingConv.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256130 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 23:17:44 +00:00
tablegen(LLVM AVRGenCallingConv.inc -gen-callingconv)
[AVR] Add AVRISelDAGToDAG.cpp Summary: This pulls the AVR instruction selector in-tree. Reviewers: arsenm, kparzysz Subscribers: llvm-commits, wdng, beanz, japaric, mgorny Differential Revision: https://reviews.llvm.org/D25278 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285270 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-27 07:03:47 +00:00
tablegen(LLVM AVRGenDAGISel.inc -gen-dag-isel)
[AVR] Add the machine code disassembler This adds a super basic implementation of a machine code disassembler. It doesn't support any operands with custom encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284930 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-22 23:57:59 +00:00
tablegen(LLVM AVRGenDisassemblerTables.inc -gen-disassembler)
[AVR] Enable generation of the TableGen assembly writer tables This also changes the order of the statements in CMakeLists.txt to be alphabetical. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283711 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-10 01:28:45 +00:00
tablegen(LLVM AVRGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM AVRGenRegisterInfo.inc -gen-register-info)
[AVR] Add a majority of the backend code Summary: This adds the majority of the AVR backend. Reviewers: hfinkel, dsanders, vkalintiris, arsenm Subscribers: dylanmckay Differential Revision: http://reviews.llvm.org/D17906 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268722 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 10:12:31 +00:00
tablegen(LLVM AVRGenSubtargetInfo.inc -gen-subtarget)
Add AVR.td and AVRRegisterInfo.td Summary: This adds the core AVR TableGen file, along with the register descriptions. Lines in AVR.td which require other TableGen files which haven't been committed yet are commented out. This is a fairly trivial patch, and should only require a quick review. I kept the line width smaller than 80 columns, but there are a few exceptions because I'm not sure how to split a string over several lines. Reviewers: stoklund Subscribers: dylanmckay, agnat Differential Revision: http://reviews.llvm.org/D14684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256120 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 12:16:20 +00:00
add_public_tablegen_target(AVRCommonTableGen)
Add AVR backend skeleton This adds part of the target info code, and adds modifications to the build scripts so that AVR is recognized a supported, experimental backend. It does not include any AVR-specific code, just the bare sources required for a backend to exist. From D14039. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-12 09:26:44 +00:00
add_llvm_target(AVRCodeGen
[AVR] Add the assembly printer Summary: This adds the AVRAsmPrinter class. Reviewers: arsenm, kparzysz Subscribers: llvm-commits, wdng, beanz, japaric, mgorny Differential Revision: https://reviews.llvm.org/D25271 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283623 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 00:02:36 +00:00
AVRAsmPrinter.cpp
[AVR] Add the pseudo instruction expansion pass Summary: A lot of the pseudo instructions are required because LLVM assumes that all integers of the same size as the pointer size are legal. This means that it will not currently expand 16-bit instructions to their 8-bit variants because it thinks 16-bit types are legal for the operations. This also adds all of the CodeGen tests that required the pass to run. Reviewers: arsenm, kparzysz Subscribers: wdng, mgorny, modocache, llvm-commits Differential Revision: https://reviews.llvm.org/D26577 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287162 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-16 21:58:04 +00:00
AVRExpandPseudoInsts.cpp
[AVR] Add the AVR frame lowering code Summary: This allows AVR to lower frames into assembly code. Reviewers: arsenm, kparzysz Subscribers: japaric, wdng, beanz, mgorny Differential Revision: https://reviews.llvm.org/D25032 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283311 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-05 11:48:56 +00:00
AVRFrameLowering.cpp
[AVR] Add missing CMake dependencies git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269901 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18 11:11:51 +00:00
AVRInstrInfo.cpp
[AVR] Add a function instrumentation pass This will be used for an on-chip test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289641 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-14 10:15:00 +00:00
AVRInstrumentFunctions.cpp
[AVR] Add AVRISelDAGToDAG.cpp Summary: This pulls the AVR instruction selector in-tree. Reviewers: arsenm, kparzysz Subscribers: llvm-commits, wdng, beanz, japaric, mgorny Differential Revision: https://reviews.llvm.org/D25278 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285270 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-27 07:03:47 +00:00
AVRISelDAGToDAG.cpp
[AVR] Add instruction selection lowering code Summary: This adds AVRISelLowering.cpp Reviewers: arsenm, kparzysz Subscribers: llvm-commits, modocache, japaric, wdng, beanz, mgorny Differential Revision: https://reviews.llvm.org/D25034 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285790 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-02 06:47:40 +00:00
AVRISelLowering.cpp
[AVR] Add the AVRMCInstLower class Summary: This class deals with the lowering of CodeGen `MachineInstr` objects to MC `MCInst` objects. Reviewers: kparzysz, arsenm Subscribers: wdng, beanz, japaric, mgorny Differential Revision: https://reviews.llvm.org/D25269 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283522 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 06:13:09 +00:00
AVRMCInstLower.cpp
[AVR] Add an 'relax memory operation' pass Summary: This pass will be used to relax instructions which use out of bounds memory accesses to equivalent operations that can work with the addresses. The pass currently implements relaxation for the STDWPtrQRr instruction. Without this pass, an assertion error would be hit in the pseudo expansion pass. In the future, we will need to add more instructions to this pass. We can do that on a case-by-case basic. Reviewers: arsenm, kparzysz Subscribers: wdng, llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D27650 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289517 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-13 05:53:14 +00:00
AVRRelaxMemOperations.cpp
[AVR] Add missing CMake dependencies git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269901 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18 11:11:51 +00:00
AVRRegisterInfo.cpp
AVRSubtarget.cpp
AVRTargetMachine.cpp
AVRTargetObjectFile.cpp
Add AVR backend skeleton This adds part of the target info code, and adds modifications to the build scripts so that AVR is recognized a supported, experimental backend. It does not include any AVR-specific code, just the bare sources required for a backend to exist. From D14039. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-12 09:26:44 +00:00
[CMake] NFC. Updating CMake dependency specifications This patch updates a bunch of places where add_dependencies was being explicitly called to add dependencies on intrinsics_gen to instead use the DEPENDS named parameter. This cleanup is needed for a patch I'm working on to add a dependency debugging mode to the build system. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287206 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-17 04:36:50 +00:00
DEPENDS
intrinsics_gen
)
Add AVR backend skeleton This adds part of the target info code, and adds modifications to the build scripts so that AVR is recognized a supported, experimental backend. It does not include any AVR-specific code, just the bare sources required for a backend to exist. From D14039. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-12 09:26:44 +00:00
[AVR] Add the assembly instruction printer Summary: This change adds the AVR assembly instruction printer. No tests are included in this patch. I have left them downstream so we can add them once `llc` successfully runs (there's very few components left to upstream until this). Reviewers: arsenm, kparzysz Subscribers: wdng, beanz, mgorny Differential Revision: https://reviews.llvm.org/D25028 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282854 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-30 14:01:50 +00:00
add_subdirectory(AsmParser)
[AVR] Compile the disassembler This also updates references of 'TheAVRTarget' to the new 'getTheAVRTarget()' method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285272 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-27 08:09:15 +00:00
add_subdirectory(Disassembler)
[AVR] Add the assembly instruction printer Summary: This change adds the AVR assembly instruction printer. No tests are included in this patch. I have left them downstream so we can add them once `llc` successfully runs (there's very few components left to upstream until this). Reviewers: arsenm, kparzysz Subscribers: wdng, beanz, mgorny Differential Revision: https://reviews.llvm.org/D25028 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282854 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-30 14:01:50 +00:00
add_subdirectory(InstPrinter)
[AVR] Fix header files in MCTargetDesc Everything now compiles successfully, but there are still undefined references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270298 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:35:07 +00:00
add_subdirectory(MCTargetDesc)
Add AVR backend skeleton This adds part of the target info code, and adds modifications to the build scripts so that AVR is recognized a supported, experimental backend. It does not include any AVR-specific code, just the bare sources required for a backend to exist. From D14039. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-12 09:26:44 +00:00
add_subdirectory(TargetInfo)
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