llvm/test/CodeGen/R600/default-fp-mode.ll

; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s

; SI-LABEL: @test_kernel
; SI: FloatMode: 192
; SI: IeeeMode: 0
define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind {
  store float 0.0, float addrspace(1)* %out0
  store double 0.0, double addrspace(1)* %out1
  ret void
}
R600/SI: Add FP mode bits to binary. The default rounding mode to initialize the mode register needs to be reported to the runtime. Fill in other bits a kernel may be interested in setting for future use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8 2014-06-26 17:22:30 +00:00			`; RUN: llc -march=r600 -mcpu=SI < %s \| FileCheck -check-prefix=SI %s`

			`; SI-LABEL: @test_kernel`
R600/SI: Default to no single precision denormals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213017 91177308-0d34-0410-b5e6-96231b3b80d8 2014-07-14 23:40:43 +00:00			`; SI: FloatMode: 192`
R600/SI: Add FP mode bits to binary. The default rounding mode to initialize the mode register needs to be reported to the runtime. Fill in other bits a kernel may be interested in setting for future use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8 2014-06-26 17:22:30 +00:00			`; SI: IeeeMode: 0`
			`define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind {`
			`store float 0.0, float addrspace(1)* %out0`
			`store double 0.0, double addrspace(1)* %out1`
			`ret void`
			`}`