llvm/test/CodeGen/Blackfin/cycles.ll

; RUN: llc < %s -march=bfin | FileCheck %s

declare i64 @llvm.readcyclecounter()

; CHECK: cycles
; CHECK: cycles2
define i64 @cyc64() {
	%tmp.1 = call i64 @llvm.readcyclecounter()
	ret i64 %tmp.1
}

; CHECK: cycles
define i32@cyc32() {
	%tmp.1 = call i64 @llvm.readcyclecounter()
        %s = trunc i64 %tmp.1 to i32
	ret i32 %s
}
Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8 2009-09-09 00:09:15 +00:00			`; RUN: llc < %s -march=bfin \| FileCheck %s`
Analog Devices Blackfin back-end. Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8 2009-08-02 17:32:10 +00:00
			`declare i64 @llvm.readcyclecounter()`

Add support for READCYCLECOUNTER in Blackfin back-end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8 2009-08-08 21:42:22 +00:00			`; CHECK: cycles`
			`; CHECK: cycles2`
			`define i64 @cyc64() {`
Analog Devices Blackfin back-end. Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8 2009-08-02 17:32:10 +00:00			`%tmp.1 = call i64 @llvm.readcyclecounter()`
			`ret i64 %tmp.1`
			`}`
Add support for READCYCLECOUNTER in Blackfin back-end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8 2009-08-08 21:42:22 +00:00
			`; CHECK: cycles`
			`define i32@cyc32() {`
			`%tmp.1 = call i64 @llvm.readcyclecounter()`
			`%s = trunc i64 %tmp.1 to i32`
			`ret i32 %s`
			`}`