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llvm/test/CodeGen/Mips/hf1_body.ll

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[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269560 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 12:43:08 +00:00
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 \
; RUN: -relocation-model=pic -no-integrated-as < %s | \
[mips] Use --check-prefixes where appropriate. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273669 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-24 12:23:17 +00:00
; RUN: FileCheck %s -check-prefixes=ALL,GAS
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269560 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 12:43:08 +00:00
; The integrated assembler expands assembly macros before printing.
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 \
; RUN: -relocation-model=pic < %s | \
[mips] Use --check-prefixes where appropriate. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273669 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-24 12:23:17 +00:00
; RUN: FileCheck %s -check-prefixes=ALL,IAS
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191400 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-25 20:58:50 +00:00
@x = external global float
; Function Attrs: nounwind
define void @v_sf(float %p) #0 {
entry:
%p.addr = alloca float, align 4
store float %p, float* %p.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00
%0 = load float, float* %p.addr, align 4
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191400 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-25 20:58:50 +00:00
store float %0, float* @x, align 4
ret void
}
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269560 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 12:43:08 +00:00
; ALL-LABEL: .ent __fn_stub_v_sf
; ALL: .cpload $25
; ALL: .set reorder
; ALL: .reloc 0, R_MIPS_NONE, v_sf
; GAS: la $25, $__fn_local_v_sf
[mips] Implement 'la' macro in PIC mode for O32. Summary: N32 support will follow in a later patch since the symbol version of 'la' incorrectly believes N32 to have 64-bit pointers and rejects it early. This fixes the three incorrectly expanded 'la' macros found in bionic. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: http://reviews.llvm.org/D20820 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271644 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-03 09:53:06 +00:00
; IAS: lw $25, %got($$__fn_local_v_sf)($gp)
[mips] Enable IAS by default for 32-bit MIPS targets (O32). Summary: The MIPS IAS can now pass 'ninja check-all', recurse, build a bootable linux kernel, and pass a variety of LNT testing. Unfortunately we can't enable it by default for 64-bit targets yet since the N32 ABI is still very buggy and this also means we can't enable it for N64 either because we can't distinguish between N32 and N64 in the relevant code. Reviewers: vkalintiris Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18759 Differential Revision: http://reviews.llvm.org/D18761 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269560 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 12:43:08 +00:00
; IAS: addiu $25, $25, %lo($$__fn_local_v_sf)
; ALL: mfc1 $4, $f12
; ALL: jr $25
; ALL: .end __fn_stub_v_sf
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