RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-12-04 10:04:33 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Rewrite some of the test/CodeGen/X86 tests to use FileCheck instead of grep

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179241 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Bendersky 2013-04-10 23:30:20 +00:00
parent 18d49acdab
commit 0120b678a0
11 changed files with 31 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -fast-isel -march=x86 < %s | grep %fs:
; RUN: llc -fast-isel -march=x86 < %s | FileCheck %s
; CHECK: %fs:
define i32 @test1(i32 addrspace(257)* %arg) nounwind {
%tmp = load i32 addrspace(257)* %arg

4
test/CodeGen/X86/fast-cc-merge-stack-adj.ll
View File

@ -1,5 +1,5 @@
; RUN: llc < %s -mcpu=generic -march=x86 -x86-asm-syntax=intel | \
; RUN: grep "add ESP, 8"
; RUN: llc < %s -mcpu=generic -march=x86 -x86-asm-syntax=intel | FileCheck %s
; CHECK: add ESP, 8
target triple = "i686-pc-linux-gnu"

3
test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -O0 -relocation-model=pic < %s | not grep call
; RUN: llc -O0 -relocation-model=pic < %s | FileCheck %s
; CHECK-NOT: call
; rdar://8396318
; Don't emit a PIC base register if no addresses are needed.

4
test/CodeGen/X86/fast-isel-constpool.ll
View File

@ -1,4 +1,6 @@
; RUN: llc < %s -fast-isel | grep "LCPI0_0(%rip)"
; RUN: llc < %s -fast-isel | FileCheck %s
; CHECK: LCPI0_0(%rip)
; Make sure fast isel uses rip-relative addressing when required.
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin9.0"

5
test/CodeGen/X86/fast-isel-fneg.ll
View File

@ -1,5 +1,8 @@
; RUN: llc < %s -fast-isel -fast-isel-abort -mtriple=x86_64-apple-darwin10 | FileCheck %s
; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | grep xor | count 2
; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s
; SSE2: xor
; SSE2: xor
; CHECK: doo:
; CHECK: xor

4
test/CodeGen/X86/fast-isel-gv.ll
View File

@ -1,4 +1,6 @@
; RUN: llc < %s -fast-isel | grep "_kill@GOTPCREL(%rip)"
; RUN: llc < %s -fast-isel | FileCheck %s
; CHECK: _kill@GOTPCREL(%rip)
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin10.0"
@f = global i8 (...)* @kill ; <i8 (...)**> [#uses=1]

3
test/CodeGen/X86/fast-isel-tailcall.ll
View File

@ -1,4 +1,5 @@
; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | not grep add
; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | FileCheck %s
; CHECK-NOT: add
; PR4154
; On x86, -tailcallopt changes the ABI so the caller shouldn't readjust

5
test/CodeGen/X86/fastcc-2.ll
View File

@ -1,5 +1,6 @@
; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep movsd
; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 1
; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
; CHECK: movsd
; CHECK-NOT: mov
define i32 @foo() nounwind {
entry:

5
test/CodeGen/X86/fastcc-byval.ll
View File

@ -1,4 +1,7 @@
; RUN: llc < %s -tailcallopt=false | grep "movl[[:space:]]*8(%esp), %eax" | count 2
; RUN: llc < %s -tailcallopt=false | FileCheck %s
; CHECK: movl 8(%esp), %eax
; CHECK: movl 8(%esp), %eax
; PR3122
; rdar://6400815

3
test/CodeGen/X86/fastcc-sret.ll
View File

@ -1,4 +1,5 @@
; RUN: llc < %s -march=x86 -tailcallopt=false | grep ret | not grep 4
; RUN: llc < %s -march=x86 -tailcallopt=false | FileCheck %s
; CHECK: ret{{[^4]*$}}
%struct.foo = type { [4 x i32] }

7
test/CodeGen/X86/fastcc3struct.ll
View File

@ -1,7 +1,8 @@
; RUN: llc < %s -march=x86 -o %t
; RUN: grep "movl .48, %ecx" %t
; RUN: grep "movl .24, %edx" %t
; RUN: grep "movl .12, %eax" %t
; RUN: FileCheck %s -input-file %t
; CHECK: movl {{.}}12, %eax
; CHECK: movl {{.}}24, %edx
; CHECK: movl {{.}}48, %ecx
%0 = type { i32, i32, i32 }