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https://github.com/RPCSX/llvm.git
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Generalize getCopyFromParts and getCopyToParts to
handle arbitrary precision integers and any number of parts. For example, on a 32 bit machine an i50 corresponds to two i32 parts. getCopyToParts will extend the i50 to an i64 then write half of the i64 to each part; getCopyFromParts will combine the two i32 parts into an i64 then truncate the result to i50. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47024 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands
parent
394d28048c
commit
014e04a5da
@ -633,100 +633,136 @@ static SDOperand getCopyFromParts(SelectionDAG &DAG,
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MVT::ValueType ValueVT,
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ISD::NodeType AssertOp = ISD::DELETED_NODE,
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bool TruncExact = false) {
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if (!MVT::isVector(ValueVT) || NumParts == 1) {
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SDOperand Val = Parts[0];
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assert(NumParts > 0 && "No parts to assemble!");
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TargetLowering &TLI = DAG.getTargetLoweringInfo();
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SDOperand Val = Parts[0];
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// If the value was expanded, copy from the top part.
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if (NumParts > 1) {
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assert(NumParts == 2 &&
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"Cannot expand to more than 2 elts yet!");
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SDOperand Hi = Parts[1];
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if (!DAG.getTargetLoweringInfo().isLittleEndian())
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std::swap(Val, Hi);
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return DAG.getNode(ISD::BUILD_PAIR, ValueVT, Val, Hi);
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}
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if (NumParts > 1) {
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// Assemble the value from multiple parts.
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if (!MVT::isVector(ValueVT)) {
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unsigned PartBits = MVT::getSizeInBits(PartVT);
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unsigned ValueBits = MVT::getSizeInBits(ValueVT);
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// Otherwise, if the value was promoted or extended, truncate it to the
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// appropriate type.
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if (PartVT == ValueVT)
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return Val;
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if (MVT::isVector(PartVT)) {
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assert(MVT::isVector(ValueVT) && "Unknown vector conversion!");
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return DAG.getNode(ISD::BIT_CONVERT, ValueVT, Val);
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}
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if (MVT::isVector(ValueVT)) {
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assert(NumParts == 1 &&
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MVT::getVectorElementType(ValueVT) == PartVT &&
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MVT::getVectorNumElements(ValueVT) == 1 &&
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"Only trivial scalar-to-vector conversions should get here!");
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return DAG.getNode(ISD::BUILD_VECTOR, ValueVT, Val);
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}
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if (MVT::isInteger(PartVT) &&
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MVT::isInteger(ValueVT)) {
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if (ValueVT < PartVT) {
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// For a truncate, see if we have any information to
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// indicate whether the truncated bits will always be
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// zero or sign-extension.
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if (AssertOp != ISD::DELETED_NODE)
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Val = DAG.getNode(AssertOp, PartVT, Val,
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DAG.getValueType(ValueVT));
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return DAG.getNode(ISD::TRUNCATE, ValueVT, Val);
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// Assemble the power of 2 part.
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unsigned RoundParts = NumParts & (NumParts - 1) ?
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1 << Log2_32(NumParts) : NumParts;
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unsigned RoundBits = PartBits * RoundParts;
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MVT::ValueType RoundVT = RoundBits == ValueBits ?
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ValueVT : MVT::getIntegerType(RoundBits);
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SDOperand Lo, Hi;
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if (RoundParts > 2) {
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MVT::ValueType HalfVT = MVT::getIntegerType(RoundBits/2);
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Lo = getCopyFromParts(DAG, Parts, RoundParts/2, PartVT, HalfVT);
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Hi = getCopyFromParts(DAG, Parts+RoundParts/2, RoundParts/2,
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PartVT, HalfVT);
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} else {
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return DAG.getNode(ISD::ANY_EXTEND, ValueVT, Val);
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Lo = Parts[0];
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Hi = Parts[1];
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}
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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Val = DAG.getNode(ISD::BUILD_PAIR, RoundVT, Lo, Hi);
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if (RoundParts < NumParts) {
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// Assemble the trailing non-power-of-2 part.
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unsigned OddParts = NumParts - RoundParts;
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MVT::ValueType OddVT = MVT::getIntegerType(OddParts * PartBits);
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Hi = getCopyFromParts(DAG, Parts+RoundParts, OddParts, PartVT, OddVT);
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// Combine the round and odd parts.
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Lo = Val;
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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MVT::ValueType TotalVT = MVT::getIntegerType(NumParts * PartBits);
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Hi = DAG.getNode(ISD::ANY_EXTEND, TotalVT, Hi);
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Hi = DAG.getNode(ISD::SHL, TotalVT, Hi,
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DAG.getConstant(MVT::getSizeInBits(Lo.getValueType()),
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TLI.getShiftAmountTy()));
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Lo = DAG.getNode(ISD::ZERO_EXTEND, TotalVT, Lo);
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Val = DAG.getNode(ISD::OR, TotalVT, Lo, Hi);
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}
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} else {
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// Handle a multi-element vector.
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MVT::ValueType IntermediateVT, RegisterVT;
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unsigned NumIntermediates;
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unsigned NumRegs =
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TLI.getVectorTypeBreakdown(ValueVT, IntermediateVT, NumIntermediates,
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RegisterVT);
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assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
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assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
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assert(RegisterVT == Parts[0].getValueType() &&
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"Part type doesn't match part!");
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// Assemble the parts into intermediate operands.
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SmallVector<SDOperand, 8> Ops(NumIntermediates);
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if (NumIntermediates == NumParts) {
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// If the register was not expanded, truncate or copy the value,
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// as appropriate.
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for (unsigned i = 0; i != NumParts; ++i)
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Ops[i] = getCopyFromParts(DAG, &Parts[i], 1,
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PartVT, IntermediateVT);
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} else if (NumParts > 0) {
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// If the intermediate type was expanded, build the intermediate operands
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// from the parts.
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assert(NumParts % NumIntermediates == 0 &&
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"Must expand into a divisible number of parts!");
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unsigned Factor = NumParts / NumIntermediates;
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for (unsigned i = 0; i != NumIntermediates; ++i)
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Ops[i] = getCopyFromParts(DAG, &Parts[i * Factor], Factor,
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PartVT, IntermediateVT);
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}
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// Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the intermediate
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// operands.
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Val = DAG.getNode(MVT::isVector(IntermediateVT) ?
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ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR,
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ValueVT, &Ops[0], NumIntermediates);
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}
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if (MVT::isFloatingPoint(PartVT) && MVT::isFloatingPoint(ValueVT))
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return DAG.getNode(ISD::FP_ROUND, ValueVT, Val,
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DAG.getIntPtrConstant(TruncExact));
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if (MVT::getSizeInBits(PartVT) == MVT::getSizeInBits(ValueVT))
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return DAG.getNode(ISD::BIT_CONVERT, ValueVT, Val);
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assert(0 && "Unknown mismatch!");
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}
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// Handle a multi-element vector.
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MVT::ValueType IntermediateVT, RegisterVT;
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unsigned NumIntermediates;
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unsigned NumRegs =
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DAG.getTargetLoweringInfo()
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.getVectorTypeBreakdown(ValueVT, IntermediateVT, NumIntermediates,
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RegisterVT);
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// There is now one part, held in Val. Correct it to match ValueVT.
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PartVT = Val.getValueType();
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assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
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assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
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assert(RegisterVT == Parts[0].getValueType() &&
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"Part type doesn't match part!");
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if (PartVT == ValueVT)
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return Val;
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// Assemble the parts into intermediate operands.
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SmallVector<SDOperand, 8> Ops(NumIntermediates);
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if (NumIntermediates == NumParts) {
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// If the register was not expanded, truncate or copy the value,
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// as appropriate.
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for (unsigned i = 0; i != NumParts; ++i)
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Ops[i] = getCopyFromParts(DAG, &Parts[i], 1,
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PartVT, IntermediateVT);
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} else if (NumParts > 0) {
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// If the intermediate type was expanded, build the intermediate operands
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// from the parts.
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assert(NumParts % NumIntermediates == 0 &&
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"Must expand into a divisible number of parts!");
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unsigned Factor = NumParts / NumIntermediates;
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for (unsigned i = 0; i != NumIntermediates; ++i)
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Ops[i] = getCopyFromParts(DAG, &Parts[i * Factor], Factor,
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PartVT, IntermediateVT);
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if (MVT::isVector(PartVT)) {
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assert(MVT::isVector(ValueVT) && "Unknown vector conversion!");
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return DAG.getNode(ISD::BIT_CONVERT, ValueVT, Val);
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}
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// Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the intermediate
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// operands.
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return DAG.getNode(MVT::isVector(IntermediateVT) ?
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ISD::CONCAT_VECTORS :
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ISD::BUILD_VECTOR,
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ValueVT, &Ops[0], NumIntermediates);
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if (MVT::isVector(ValueVT)) {
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assert(MVT::getVectorElementType(ValueVT) == PartVT &&
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MVT::getVectorNumElements(ValueVT) == 1 &&
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"Only trivial scalar-to-vector conversions should get here!");
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return DAG.getNode(ISD::BUILD_VECTOR, ValueVT, Val);
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}
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if (MVT::isInteger(PartVT) &&
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MVT::isInteger(ValueVT)) {
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if (MVT::getSizeInBits(ValueVT) < MVT::getSizeInBits(PartVT)) {
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// For a truncate, see if we have any information to
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// indicate whether the truncated bits will always be
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// zero or sign-extension.
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if (AssertOp != ISD::DELETED_NODE)
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Val = DAG.getNode(AssertOp, PartVT, Val,
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DAG.getValueType(ValueVT));
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return DAG.getNode(ISD::TRUNCATE, ValueVT, Val);
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} else {
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return DAG.getNode(ISD::ANY_EXTEND, ValueVT, Val);
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}
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}
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if (MVT::isFloatingPoint(PartVT) && MVT::isFloatingPoint(ValueVT))
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return DAG.getNode(ISD::FP_ROUND, ValueVT, Val,
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DAG.getIntPtrConstant(TruncExact));
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if (MVT::getSizeInBits(PartVT) == MVT::getSizeInBits(ValueVT))
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return DAG.getNode(ISD::BIT_CONVERT, ValueVT, Val);
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assert(0 && "Unknown mismatch!");
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}
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/// getCopyToParts - Create a series of nodes that contain the specified value
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@ -741,47 +777,113 @@ static void getCopyToParts(SelectionDAG &DAG,
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TargetLowering &TLI = DAG.getTargetLoweringInfo();
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MVT::ValueType PtrVT = TLI.getPointerTy();
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MVT::ValueType ValueVT = Val.getValueType();
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unsigned PartBits = MVT::getSizeInBits(PartVT);
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assert(TLI.isTypeLegal(PartVT) && "Copying to an illegal type!");
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if (!MVT::isVector(ValueVT) || NumParts == 1) {
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// If the value was expanded, copy from the parts.
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if (NumParts > 1) {
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for (unsigned i = 0; i != NumParts; ++i)
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Parts[i] = DAG.getNode(ISD::EXTRACT_ELEMENT, PartVT, Val,
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DAG.getConstant(i, PtrVT));
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if (!DAG.getTargetLoweringInfo().isLittleEndian())
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std::reverse(Parts, Parts + NumParts);
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if (!NumParts)
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return;
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if (!MVT::isVector(ValueVT)) {
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if (PartVT == ValueVT) {
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assert(NumParts == 1 && "No-op copy with multiple parts!");
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Parts[0] = Val;
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return;
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}
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// If there is a single part and the types differ, this must be
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// a promotion.
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if (PartVT != ValueVT) {
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if (MVT::isVector(PartVT)) {
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assert(MVT::isVector(ValueVT) &&
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"Not a vector-vector cast?");
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Val = DAG.getNode(ISD::BIT_CONVERT, PartVT, Val);
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} else if (MVT::isVector(ValueVT)) {
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assert(NumParts == 1 &&
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MVT::getVectorElementType(ValueVT) == PartVT &&
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MVT::getVectorNumElements(ValueVT) == 1 &&
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"Only trivial vector-to-scalar conversions should get here!");
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Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, PartVT, Val,
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DAG.getConstant(0, PtrVT));
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} else if (MVT::isInteger(PartVT) && MVT::isInteger(ValueVT)) {
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if (PartVT < ValueVT)
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Val = DAG.getNode(ISD::TRUNCATE, PartVT, Val);
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else
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Val = DAG.getNode(ExtendKind, PartVT, Val);
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} else if (MVT::isFloatingPoint(PartVT) &&
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MVT::isFloatingPoint(ValueVT)) {
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if (NumParts * PartBits > MVT::getSizeInBits(ValueVT)) {
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// If the parts cover more bits than the value has, promote the value.
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if (MVT::isFloatingPoint(PartVT) && MVT::isFloatingPoint(ValueVT)) {
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assert(NumParts == 1 && "Do not know what to promote to!");
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Val = DAG.getNode(ISD::FP_EXTEND, PartVT, Val);
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} else if (MVT::getSizeInBits(PartVT) ==
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MVT::getSizeInBits(ValueVT)) {
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Val = DAG.getNode(ISD::BIT_CONVERT, PartVT, Val);
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} else if (MVT::isInteger(PartVT) && MVT::isInteger(ValueVT)) {
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ValueVT = MVT::getIntegerType(NumParts * PartBits);
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Val = DAG.getNode(ExtendKind, ValueVT, Val);
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} else {
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assert(0 && "Unknown mismatch!");
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}
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} else if (PartBits == MVT::getSizeInBits(ValueVT)) {
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// Different types of the same size.
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assert(NumParts == 1 && PartVT != ValueVT);
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Val = DAG.getNode(ISD::BIT_CONVERT, PartVT, Val);
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} else if (NumParts * PartBits < MVT::getSizeInBits(ValueVT)) {
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// If the parts cover less bits than value has, truncate the value.
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if (MVT::isInteger(PartVT) && MVT::isInteger(ValueVT)) {
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ValueVT = MVT::getIntegerType(NumParts * PartBits);
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Val = DAG.getNode(ISD::TRUNCATE, ValueVT, Val);
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} else {
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assert(0 && "Unknown mismatch!");
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}
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}
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// The value may have changed - recompute ValueVT.
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ValueVT = Val.getValueType();
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assert(NumParts * PartBits == MVT::getSizeInBits(ValueVT) &&
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"Failed to tile the value with PartVT!");
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if (NumParts == 1) {
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assert(PartVT == ValueVT && "Type conversion failed!");
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Parts[0] = Val;
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return;
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}
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// Expand the value into multiple parts.
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if (NumParts & (NumParts - 1)) {
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// The number of parts is not a power of 2. Split off and copy the tail.
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assert(MVT::isInteger(PartVT) && MVT::isInteger(ValueVT) &&
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"Do not know what to expand to!");
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unsigned RoundParts = 1 << Log2_32(NumParts);
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unsigned RoundBits = RoundParts * PartBits;
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unsigned OddParts = NumParts - RoundParts;
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SDOperand OddVal = DAG.getNode(ISD::SRL, ValueVT, Val,
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DAG.getConstant(RoundBits,
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TLI.getShiftAmountTy()));
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getCopyToParts(DAG, OddVal, Parts + RoundParts, OddParts, PartVT);
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if (TLI.isBigEndian())
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// The odd parts were reversed by getCopyToParts - unreverse them.
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std::reverse(Parts + RoundParts, Parts + NumParts);
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NumParts = RoundParts;
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ValueVT = MVT::getIntegerType(NumParts * PartBits);
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Val = DAG.getNode(ISD::TRUNCATE, ValueVT, Val);
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}
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// The number of parts is a power of 2. Repeatedly bisect the value using
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// EXTRACT_ELEMENT.
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Parts[0] = Val;
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for (unsigned StepSize = NumParts; StepSize > 1; StepSize /= 2) {
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for (unsigned i = 0; i < NumParts; i += StepSize) {
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unsigned ThisBits = StepSize * PartBits / 2;
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MVT::ValueType ThisVT =
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ThisBits == PartBits ? PartVT : MVT::getIntegerType (ThisBits);
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Parts[i+StepSize/2] =
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DAG.getNode(ISD::EXTRACT_ELEMENT, ThisVT, Parts[i],
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DAG.getConstant(1, PtrVT));
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Parts[i] =
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DAG.getNode(ISD::EXTRACT_ELEMENT, ThisVT, Parts[i],
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DAG.getConstant(0, PtrVT));
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}
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}
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if (TLI.isBigEndian())
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std::reverse(Parts, Parts + NumParts);
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return;
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}
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// Vector ValueVT.
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if (NumParts == 1) {
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if (PartVT != ValueVT) {
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if (MVT::isVector(PartVT)) {
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Val = DAG.getNode(ISD::BIT_CONVERT, PartVT, Val);
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} else {
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assert(MVT::getVectorElementType(ValueVT) == PartVT &&
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MVT::getVectorNumElements(ValueVT) == 1 &&
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"Only trivial vector-to-scalar conversions should get here!");
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Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, PartVT, Val,
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DAG.getConstant(0, PtrVT));
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}
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}
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Parts[0] = Val;
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return;
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}
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