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https://github.com/RPCSX/llvm.git
synced 2024-12-11 21:57:55 +00:00
Code insertion methods now return void instead of an int.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15780 91177308-0d34-0410-b5e6-96231b3b80d8
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078fee3f2e
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@ -25,7 +25,7 @@ SparcV8RegisterInfo::SparcV8RegisterInfo()
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: SparcV8GenRegisterInfo(V8::ADJCALLSTACKDOWN,
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V8::ADJCALLSTACKUP) {}
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int SparcV8RegisterInfo::
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void SparcV8RegisterInfo::
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storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned SrcReg, int FrameIdx) const {
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const TargetRegisterClass *RC = getRegClass(SrcReg);
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@ -42,10 +42,9 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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.addReg (SrcReg);
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else
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assert (0 && "Can't store this register to stack slot");
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return 1;
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}
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int SparcV8RegisterInfo::
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void SparcV8RegisterInfo::
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loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned DestReg, int FrameIdx) const {
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const TargetRegisterClass *RC = getRegClass(DestReg);
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@ -58,21 +57,19 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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BuildMI (MBB, I, V8::LDDFri, 2, DestReg).addFrameIndex (FrameIdx)
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.addSImm (0);
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else
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assert (0 && "Can't load this register from stack slot");
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return 1;
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assert(0 && "Can't load this register from stack slot");
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}
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int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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void SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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else if (RC == SparcV8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::FMOVS, 1, DestReg).addReg (SrcReg);
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else
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assert (0 && "Can't copy this register");
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return 1;
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}
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void SparcV8RegisterInfo::
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@ -26,17 +26,17 @@ struct SparcV8RegisterInfo : public SparcV8GenRegisterInfo {
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const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
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/// Code Generation virtual methods...
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int storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned SrcReg, int FrameIndex) const;
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int loadRegFromStackSlot(MachineBasicBlock &MBB,
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, int FrameIndex) const;
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unsigned SrcReg, int FrameIndex) const;
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void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, int FrameIndex) const;
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int copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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@ -25,7 +25,7 @@ SparcV8RegisterInfo::SparcV8RegisterInfo()
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: SparcV8GenRegisterInfo(V8::ADJCALLSTACKDOWN,
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V8::ADJCALLSTACKUP) {}
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int SparcV8RegisterInfo::
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void SparcV8RegisterInfo::
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storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned SrcReg, int FrameIdx) const {
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const TargetRegisterClass *RC = getRegClass(SrcReg);
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@ -42,10 +42,9 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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.addReg (SrcReg);
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else
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assert (0 && "Can't store this register to stack slot");
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return 1;
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}
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int SparcV8RegisterInfo::
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void SparcV8RegisterInfo::
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loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned DestReg, int FrameIdx) const {
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const TargetRegisterClass *RC = getRegClass(DestReg);
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@ -58,21 +57,19 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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BuildMI (MBB, I, V8::LDDFri, 2, DestReg).addFrameIndex (FrameIdx)
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.addSImm (0);
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else
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assert (0 && "Can't load this register from stack slot");
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return 1;
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assert(0 && "Can't load this register from stack slot");
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}
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int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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void SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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else if (RC == SparcV8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::FMOVS, 1, DestReg).addReg (SrcReg);
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else
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assert (0 && "Can't copy this register");
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return 1;
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}
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void SparcV8RegisterInfo::
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@ -26,17 +26,17 @@ struct SparcV8RegisterInfo : public SparcV8GenRegisterInfo {
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const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
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/// Code Generation virtual methods...
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int storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned SrcReg, int FrameIndex) const;
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int loadRegFromStackSlot(MachineBasicBlock &MBB,
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, int FrameIndex) const;
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unsigned SrcReg, int FrameIndex) const;
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void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, int FrameIndex) const;
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int copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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@ -276,19 +276,19 @@ SparcV9RegisterInfo::SparcV9RegisterInfo ()
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RegisterClasses + 5) {
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}
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int SparcV9RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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void SparcV9RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, int FrameIndex) const{
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abort ();
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}
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int SparcV9RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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void SparcV9RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIndex) const {
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abort ();
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}
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int SparcV9RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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void SparcV9RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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@ -25,13 +25,13 @@ struct SparcV9RegisterInfo : public MRegisterInfo {
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const unsigned *getCalleeSaveRegs() const;
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// The rest of these are stubs... for now.
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int storeRegToStackSlot (MachineBasicBlock &MBB,
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, int FrameIndex) const;
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int loadRegFromStackSlot (MachineBasicBlock &MBB,
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void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIndex) const;
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int copyRegToReg (MachineBasicBlock &MBB,
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void copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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@ -54,37 +54,34 @@ static unsigned getIdx(const TargetRegisterClass *RC) {
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}
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}
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int X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, int FrameIdx) const {
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void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, int FrameIdx) const {
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static const unsigned Opcode[] =
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{ X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FSTP80m };
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const TargetRegisterClass *RC = getRegClass(SrcReg);
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MachineInstr *I = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
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FrameIdx).addReg(SrcReg);
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MBB.insert(MI, I);
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return 1;
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}
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int X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIdx) const{
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void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIdx)const{
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static const unsigned Opcode[] =
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{ X86::MOV8rm, X86::MOV16rm, X86::MOV32rm, X86::FLD80m };
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const TargetRegisterClass *RC = getRegClass(DestReg);
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unsigned OC = Opcode[getIdx(RC)];
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MBB.insert(MI, addFrameReference(BuildMI(OC, 4, DestReg), FrameIdx));
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return 1;
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}
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int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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static const unsigned Opcode[] =
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{ X86::MOV8rr, X86::MOV16rr, X86::MOV32rr, X86::FpMOV };
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MBB.insert(MI, BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg));
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return 1;
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}
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static MachineInstr *MakeMInst(unsigned Opcode, unsigned FrameIndex,
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const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
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/// Code Generation virtual methods...
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int storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, int FrameIndex) const;
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int loadRegFromStackSlot(MachineBasicBlock &MBB,
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIndex) const;
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unsigned SrcReg, int FrameIndex) const;
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void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIndex) const;
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int copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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void copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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/// foldMemoryOperand - If this target supports it, fold a load or store of
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/// the specified stack slot into the specified machine instruction for the
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