Handle 'lshr' instruction with SCEVUDiv object.

Comment the xor %x, -1 case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53167 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nick Lewycky 2008-07-07 06:15:49 +00:00
parent 8870ce951d
commit 01eaf803ca

View File

@ -1742,12 +1742,14 @@ SCEVHandle ScalarEvolutionsImpl::createSCEV(Value *V) {
}
break;
case Instruction::Xor:
// If the RHS of the xor is a signbit, then this is just an add.
// Instcombine turns add of signbit into xor as a strength reduction step.
if (ConstantInt *CI = dyn_cast<ConstantInt>(U->getOperand(1))) {
// If the RHS of the xor is a signbit, then this is just an add.
// Instcombine turns add of signbit into xor as a strength reduction step.
if (CI->getValue().isSignBit())
return SE.getAddExpr(getSCEV(U->getOperand(0)),
getSCEV(U->getOperand(1)));
// If the RHS of xor is -1, then this is a not operation.
else if (CI->isAllOnesValue())
return SE.getNotSCEV(getSCEV(U->getOperand(0)));
}
@ -1763,6 +1765,16 @@ SCEVHandle ScalarEvolutionsImpl::createSCEV(Value *V) {
}
break;
case Instruction::LShr:
// Turn logical shift right of a constant into a unsigned divide.
if (ConstantInt *SA = dyn_cast<ConstantInt>(U->getOperand(1))) {
uint32_t BitWidth = cast<IntegerType>(V->getType())->getBitWidth();
Constant *X = ConstantInt::get(
APInt(BitWidth, 1).shl(SA->getLimitedValue(BitWidth)));
return SE.getUDivExpr(getSCEV(U->getOperand(0)), getSCEV(X));
}
break;
case Instruction::Trunc:
return SE.getTruncateExpr(getSCEV(U->getOperand(0)), U->getType());