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Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140997 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2011-10-03 08:14:29 +00:00
parent 04b0b34b3a
commit 04c5be9f12
3 changed files with 9 additions and 0 deletions
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3
lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
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@ -1491,6 +1491,9 @@ static int readVVVV(struct InternalInstruction* insn) {
else
return -1;
if (insn->mode != MODE_64BIT)
insn->vvvv &= 0x7;
return 0;
}

3
test/MC/Disassembler/X86/simple-tests.txt
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@ -365,3 +365,6 @@
# CHECK: testq $0, %rax
0x48 0xa9 0x00 0x00 0x00 0x00
# CHECK: vaddps %xmm3, %xmm15, %xmm0
0xc4 0xe1 0x00 0x58 0xc3

3
test/MC/Disassembler/X86/x86-32.txt
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@ -384,3 +384,6 @@
# CHECK: movl %eax, 0
0xa3 0x00 0x00 0x00 0x00
# CHECK: vaddps %xmm3, %xmm7, %xmm0
0xc4 0xe1 0x00 0x58 0xc3