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R600: Fix trunc store from i64 to i1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203695 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -98,10 +98,16 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
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setTruncStoreAction(MVT::v2i32, MVT::v2i16, Custom);
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setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom);
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setTruncStoreAction(MVT::v4i32, MVT::v4i8, Custom);
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// XXX: This can be change to Custom, once ExpandVectorStores can
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// handle 64-bit stores.
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setTruncStoreAction(MVT::v4i32, MVT::v4i16, Expand);
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setTruncStoreAction(MVT::i64, MVT::i1, Expand);
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setTruncStoreAction(MVT::v2i64, MVT::v2i1, Expand);
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setTruncStoreAction(MVT::v4i64, MVT::v4i1, Expand);
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setOperationAction(ISD::LOAD, MVT::f32, Promote);
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AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32);
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30
test/CodeGen/R600/trunc-store-i1.ll
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30
test/CodeGen/R600/trunc-store-i1.ll
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@ -0,0 +1,30 @@
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; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
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; SI-LABEL: @global_truncstore_i32_to_i1
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; SI: S_LOAD_DWORD [[LOAD:s[0-9]+]],
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; SI: V_AND_B32_e64 [[VREG:v[0-9]+]], 1, [[LOAD]], 0, 0, 0, 0
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; SI: BUFFER_STORE_BYTE [[VREG]],
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define void @global_truncstore_i32_to_i1(i1 addrspace(1)* %out, i32 %val) nounwind {
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%trunc = trunc i32 %val to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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; SI-LABEL: @global_truncstore_i64_to_i1
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; SI: BUFFER_STORE_BYTE
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define void @global_truncstore_i64_to_i1(i1 addrspace(1)* %out, i64 %val) nounwind {
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%trunc = trunc i64 %val to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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; SI-LABEL: @global_truncstore_i16_to_i1
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; SI: S_LOAD_DWORD [[LOAD:s[0-9]+]],
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; SI: V_AND_B32_e64 [[VREG:v[0-9]+]], 1, [[LOAD]], 0, 0, 0, 0
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; SI: BUFFER_STORE_BYTE [[VREG]],
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define void @global_truncstore_i16_to_i1(i1 addrspace(1)* %out, i16 %val) nounwind {
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%trunc = trunc i16 %val to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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