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Remove Streams.h from the targets.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79853 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2009-08-23 11:52:17 +00:00
parent cfa6ec92e6
commit 072a56e37d
4 changed files with 26 additions and 31 deletions
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1
lib/Target/ARM/ARMJITInfo.cpp
View File

@ -22,7 +22,6 @@
#include "llvm/Config/alloca.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Streams.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/System/Memory.h"
#include <cstdlib>

18
lib/Target/CellSPU/SPUInstrInfo.cpp
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@ -17,9 +17,9 @@
#include "SPUTargetMachine.h"
#include "SPUGenInstrInfo.inc"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Support/Streams.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@ -464,7 +464,7 @@ SPUInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
} else if (isCondBranch(LastInst)) {
// Block ends with fall-through condbranch.
TBB = LastInst->getOperand(1).getMBB();
DEBUG(cerr << "Pushing LastInst: ");
DEBUG(errs() << "Pushing LastInst: ");
DEBUG(LastInst->dump());
Cond.push_back(MachineOperand::CreateImm(LastInst->getOpcode()));
Cond.push_back(LastInst->getOperand(0));
@ -485,7 +485,7 @@ SPUInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
// If the block ends with a conditional and unconditional branch, handle it.
if (isCondBranch(SecondLastInst) && isUncondBranch(LastInst)) {
TBB = SecondLastInst->getOperand(1).getMBB();
DEBUG(cerr << "Pushing SecondLastInst: ");
DEBUG(errs() << "Pushing SecondLastInst: ");
DEBUG(SecondLastInst->dump());
Cond.push_back(MachineOperand::CreateImm(SecondLastInst->getOpcode()));
Cond.push_back(SecondLastInst->getOperand(0));
@ -517,7 +517,7 @@ SPUInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
return 0;
// Remove the first branch.
DEBUG(cerr << "Removing branch: ");
DEBUG(errs() << "Removing branch: ");
DEBUG(I->dump());
I->eraseFromParent();
I = MBB.end();
@ -529,7 +529,7 @@ SPUInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
return 1;
// Remove the second branch.
DEBUG(cerr << "Removing second branch: ");
DEBUG(errs() << "Removing second branch: ");
DEBUG(I->dump());
I->eraseFromParent();
return 2;
@ -553,14 +553,14 @@ SPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineInstrBuilder MIB = BuildMI(&MBB, dl, get(SPU::BR));
MIB.addMBB(TBB);
DEBUG(cerr << "Inserted one-way uncond branch: ");
DEBUG(errs() << "Inserted one-way uncond branch: ");
DEBUG((*MIB).dump());
} else {
// Conditional branch
MachineInstrBuilder MIB = BuildMI(&MBB, dl, get(Cond[0].getImm()));
MIB.addReg(Cond[1].getReg()).addMBB(TBB);
DEBUG(cerr << "Inserted one-way cond branch: ");
DEBUG(errs() << "Inserted one-way cond branch: ");
DEBUG((*MIB).dump());
}
return 1;
@ -572,9 +572,9 @@ SPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MIB.addReg(Cond[1].getReg()).addMBB(TBB);
MIB2.addMBB(FBB);
DEBUG(cerr << "Inserted conditional branch: ");
DEBUG(errs() << "Inserted conditional branch: ");
DEBUG((*MIB).dump());
DEBUG(cerr << "part 2: ");
DEBUG(errs() << "part 2: ");
DEBUG((*MIB2).dump());
return 2;
}

3
lib/Target/CppBackend/CPPBackend.cpp
View File

@ -23,13 +23,10 @@
#include "llvm/Pass.h"
#include "llvm/PassManager.h"
#include "llvm/TypeSymbolTable.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/Streams.h"
#include "llvm/Target/TargetRegistry.h"
#include "llvm/Config/config.h"
#include <algorithm>

35
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -37,7 +37,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Streams.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/Statistic.h"
@ -107,37 +106,37 @@ namespace {
}
void dump() {
cerr << "X86ISelAddressMode " << this << '\n';
cerr << "Base.Reg ";
errs() << "X86ISelAddressMode " << this << '\n';
errs() << "Base.Reg ";
if (Base.Reg.getNode() != 0)
Base.Reg.getNode()->dump();
else
cerr << "nul";
cerr << " Base.FrameIndex " << Base.FrameIndex << '\n';
cerr << " Scale" << Scale << '\n';
cerr << "IndexReg ";
errs() << "nul";
errs() << " Base.FrameIndex " << Base.FrameIndex << '\n'
<< " Scale" << Scale << '\n'
<< "IndexReg ";
if (IndexReg.getNode() != 0)
IndexReg.getNode()->dump();
else
cerr << "nul";
cerr << " Disp " << Disp << '\n';
cerr << "GV ";
errs() << "nul";
errs() << " Disp " << Disp << '\n'
<< "GV ";
if (GV)
GV->dump();
else
cerr << "nul";
cerr << " CP ";
errs() << "nul";
errs() << " CP ";
if (CP)
CP->dump();
else
cerr << "nul";
cerr << '\n';
cerr << "ES ";
errs() << "nul";
errs() << '\n'
<< "ES ";
if (ES)
cerr << ES;
errs() << ES;
else
cerr << "nul";
cerr << " JT" << JT << " Align" << Align << '\n';
errs() << "nul";
errs() << " JT" << JT << " Align" << Align << '\n';
}
};
}