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Fix build failures from r159106.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159107 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-06-24 06:08:31 +00:00
parent 66a69fa729
commit 081f931077
2 changed files with 2 additions and 4 deletions
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2
lib/Target/X86/X86InstrInfo.cpp
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@ -410,7 +410,6 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
{ X86::IMUL64rri8, X86::IMUL64rmi8, 0 },
{ X86::Int_COMISDrr, X86::Int_COMISDrm, 0 },
{ X86::Int_COMISSrr, X86::Int_COMISSrm, 0 },
{ X86::Int_CVTPD2PSrr, X86::Int_CVTPD2PSrm, TB_ALIGN_16 },
{ X86::Int_CVTPS2DQrr, X86::Int_CVTPS2DQrm, TB_ALIGN_16 },
{ X86::Int_CVTPS2PDrr, X86::Int_CVTPS2PDrm, 0 },
{ X86::CVTSD2SI64rr, X86::CVTSD2SI64rm, 0 },
@ -493,7 +492,6 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
// AVX 128-bit versions of foldable instructions
{ X86::Int_VCOMISDrr, X86::Int_VCOMISDrm, 0 },
{ X86::Int_VCOMISSrr, X86::Int_VCOMISSrm, 0 },
{ X86::Int_VCVTPD2PSrr, X86::Int_VCVTPD2PSrm, TB_ALIGN_16 },
{ X86::Int_VCVTPS2DQrr, X86::Int_VCVTPS2DQrm, TB_ALIGN_16 },
{ X86::Int_VCVTPS2PDrr, X86::Int_VCVTPS2PDrm, 0 },
{ X86::Int_VUCOMISDrr, X86::Int_VUCOMISDrm, 0 },

4
lib/Target/X86/X86InstrSSE.td
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@ -2134,14 +2134,14 @@ let Predicates = [HasAVX] in {
def : Pat<(int_x86_sse2_cvtpd2ps VR128:$src),
(VCVTPD2PSrr VR128:$src)>;
def : Pat<(int_x86_sse2_cvtpd2ps (memopv2f64 addr:$src)),
(VCVTPD2PSrr VR128:$src)>;
(VCVTPD2PSXrm addr:$src)>;
}
let Predicates = [HasSSE2] in {
def : Pat<(int_x86_sse2_cvtpd2ps VR128:$src),
(CVTPD2PSrr VR128:$src)>;
def : Pat<(int_x86_sse2_cvtpd2ps (memopv2f64 addr:$src)),
(CVTPD2PSrr VR128:$src)>;
(CVTPD2PSrm addr:$src)>;
}
// AVX 256-bit register conversion intrinsics