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fixed printing messages

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@590 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ruchira Sasanka 2001-09-15 19:06:58 +00:00
parent 4d0d632927
commit 0931a01f57
6 changed files with 242 additions and 64 deletions
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6
lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
View File

@ -120,8 +120,10 @@ void LiveRangeInfo::constructLiveRanges()
OpI.getMachineOperand().getVRegValue(), isCC ); OpI.getMachineOperand().getVRegValue(), isCC );
if(isCC ) if(isCC ) {
cout << "\a" << "**created a LR for a CC reg**" << cout; cout << "\a**created a LR for a CC reg:";
printValue( OpI.getMachineOperand().getVRegValue() );
}
DefRange->setRegClass( RegClassList[ rcid ] ); DefRange->setRegClass( RegClassList[ rcid ] );

118
lib/CodeGen/RegAlloc/PhyRegAloc.cpp
View File

@ -28,7 +28,7 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M,
void PhyRegAlloc::createIGNodeListsAndIGs() void PhyRegAlloc::createIGNodeListsAndIGs()
{ {
cout << "Creating LR lists ..." << endl; if(DEBUG_RA ) cout << "Creating LR lists ..." << endl;
// hash map iterator // hash map iterator
LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin(); LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin();
@ -113,7 +113,7 @@ void PhyRegAlloc::addInterference(const Value *const Def,
LROfVar->addCallInterference( (const Instruction *const) Def ); LROfVar->addCallInterference( (const Instruction *const) Def );
} }
else if(DEBUG_RA) { else if(DEBUG_RA > 1) {
// we will not have LRs for values not explicitly allocated in the // we will not have LRs for values not explicitly allocated in the
// instruction stream (e.g., constants) // instruction stream (e.g., constants)
cout << " warning: no live range for " ; cout << " warning: no live range for " ;
@ -221,7 +221,73 @@ void PhyRegAlloc::updateMachineCode()
for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
cout << endl << "BB "; printValue( *BBI); cout << ": "; // get the iterator for machine instructions
MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin();
// iterate over all the machine instructions in BB
for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
MachineInstr *const MInst = *MInstIterator;
//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
MachineOperand& Op = MInst->getOperand(OpNum);
if( Op.getOperandType() == MachineOperand::MO_VirtualRegister ||
Op.getOperandType() == MachineOperand::MO_CCRegister) {
const Value *const Val = Op.getVRegValue();
// delete this condition checking later (must assert if Val is null)
if( !Val ) {
cout << "Error: NULL Value found in instr." << endl;
continue;
}
assert( Val && "Value is NULL");
const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
if ( !LR ) {
if( ! ( (Val->getType())->isLabelType() ||
(Val->getValueType() == Value::ConstantVal) ) ) {
cout << "Warning: No LiveRange for: ";
printValue( Val); cout << endl;
}
//assert( LR && "No LR found for Value");
continue;
}
unsigned RCID = (LR->getRegClass())->getID();
Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
}
}
}
}
}
void PhyRegAlloc::printMachineCode()
{
cout << endl << ";************** Method ";
cout << Meth->getName() << " *****************" << endl;
Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
cout << endl ; printLabel( *BBI); cout << ": ";
// get the iterator for machine instructions // get the iterator for machine instructions
MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec(); MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
@ -232,8 +298,10 @@ void PhyRegAlloc::updateMachineCode()
MachineInstr *const MInst = *MInstIterator; MachineInstr *const MInst = *MInstIterator;
cout << endl << "\t"; cout << endl << "\t";
cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString; cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) { //for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
@ -247,7 +315,7 @@ void PhyRegAlloc::updateMachineCode()
const Value *const Val = Op.getVRegValue(); const Value *const Val = Op.getVRegValue();
if( !Val ) { if( !Val ) {
cout << "\t<** Value is NULL!!!**>"; cout << "\t<*NULL Value*>";
continue; continue;
} }
assert( Val && "Value is NULL"); assert( Val && "Value is NULL");
@ -255,6 +323,8 @@ void PhyRegAlloc::updateMachineCode()
const LiveRange *const LR = LRI.getLiveRangeForValue(Val); const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
if ( !LR ) { if ( !LR ) {
if( ! ( (Val->getType())->isLabelType() || if( ! ( (Val->getType())->isLabelType() ||
(Val->getValueType() == Value::ConstantVal) ) ) { (Val->getValueType() == Value::ConstantVal) ) ) {
cout << "\t" << "<*No LiveRange for: "; cout << "\t" << "<*No LiveRange for: ";
@ -271,22 +341,50 @@ void PhyRegAlloc::updateMachineCode()
//cout << "Setting reg for value: "; printValue( Val ); //cout << "Setting reg for value: "; printValue( Val );
//cout << endl; //cout << endl;
//Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) ); Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor()); int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum ); cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
} }
else if( Op.getOperandType() == MachineOperand:: MO_MachineRegister) {
cout << "\t" << "%"<< MRI.getUnifiedRegName( Op.getMachineRegNum() );
}
else if( Op.getOperandType() == MachineOperand::MO_PCRelativeDisp ) {
const Value *const Val = Op.getVRegValue () ;
if( !Val ) {
cout << "\t<*NULL Value*>";
continue;
}
if( (Val->getValueType() == Value::BasicBlockVal))
{ cout << "\t"; printLabel( Op.getVRegValue () ); }
else { cout << "\t"; printValue( Val ); }
}
else else
cout << "\t" << Op; // use dump field cout << "\t" << Op; // use dump field
} }
} }
cout << endl;
} }
cout << endl;
} }
void PhyRegAlloc::printLabel(const Value *const Val)
{
if( Val->hasName() )
cout << Val->getName();
else
cout << "Label" << Val;
}
@ -328,14 +426,16 @@ void PhyRegAlloc::allocateRegisters()
} }
MRI.colorArgs(Meth, LRI); // color method args MRI.colorArgs(Meth, LRI); // color method args
MRI.colorCallArgs(CallInstrList, LRI, AddedInstrMap); // color call args of call instrns // color call args of call instrns
MRI.colorCallArgs(CallInstrList, LRI, AddedInstrMap);
// color all register classes // color all register classes
for( unsigned int rc=0; rc < NumOfRegClasses ; rc++) for( unsigned int rc=0; rc < NumOfRegClasses ; rc++)
RegClassList[ rc ]->colorAllRegs(); RegClassList[ rc ]->colorAllRegs();
updateMachineCode(); //updateMachineCode();
//PrintMachineInstructions(Meth); PrintMachineInstructions(Meth);
printMachineCode(); // only for DEBUGGING
} }

29
lib/CodeGen/RegAlloc/RegClass.cpp
View File

@ -169,34 +169,21 @@ void RegClass::colorIGNode(IGNode *const Node)
MRC->colorIGNode(Node, IsColorUsedArr); MRC->colorIGNode(Node, IsColorUsedArr);
} }
else { else {
cout << " Node " << Node->getIndex(); if( DEBUG_RA ) {
cout << " already colored with color " << Node->getColor() << endl; cout << " Node " << Node->getIndex();
cout << " already colored with color " << Node->getColor() << endl;
}
} }
if( !Node->hasColor() ) { if( !Node->hasColor() ) {
cout << " Node " << Node->getIndex(); if( DEBUG_RA ) {
cout << " - could not find a color (needs spilling)" << endl; cout << " Node " << Node->getIndex();
cout << " - could not find a color (needs spilling)" << endl;
}
} }
} }
#if 0
if( DEBUG_RA) { // printing code
/* cout << " Node " << Node->getIndex();
if( Node->hasColor() ) {
cout << " colored with color " << Node->getColor() << " [" ;
cout << SparcFloatRegOrder::getRegName(Node->getColor());
if( Node->getTypeID() == Type::DoubleTyID )
cout << "+" << SparcFloatRegOrder::getRegName(Node->getColor()+1);
cout << "]" << endl;
}
*/
// MRC->printReg( Node->getParentLR());
cout << " Node " << Node->getIndex();
if( Node->hasColor() )
cout << " colored with color " << Node->getColor() << endl;
#endif

6
lib/Target/SparcV9/RegAlloc/LiveRangeInfo.cpp
View File

@ -120,8 +120,10 @@ void LiveRangeInfo::constructLiveRanges()
OpI.getMachineOperand().getVRegValue(), isCC ); OpI.getMachineOperand().getVRegValue(), isCC );
if(isCC ) if(isCC ) {
cout << "\a" << "**created a LR for a CC reg**" << cout; cout << "\a**created a LR for a CC reg:";
printValue( OpI.getMachineOperand().getVRegValue() );
}
DefRange->setRegClass( RegClassList[ rcid ] ); DefRange->setRegClass( RegClassList[ rcid ] );

118
lib/Target/SparcV9/RegAlloc/PhyRegAloc.cpp
View File

@ -28,7 +28,7 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M,
void PhyRegAlloc::createIGNodeListsAndIGs() void PhyRegAlloc::createIGNodeListsAndIGs()
{ {
cout << "Creating LR lists ..." << endl; if(DEBUG_RA ) cout << "Creating LR lists ..." << endl;
// hash map iterator // hash map iterator
LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin(); LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin();
@ -113,7 +113,7 @@ void PhyRegAlloc::addInterference(const Value *const Def,
LROfVar->addCallInterference( (const Instruction *const) Def ); LROfVar->addCallInterference( (const Instruction *const) Def );
} }
else if(DEBUG_RA) { else if(DEBUG_RA > 1) {
// we will not have LRs for values not explicitly allocated in the // we will not have LRs for values not explicitly allocated in the
// instruction stream (e.g., constants) // instruction stream (e.g., constants)
cout << " warning: no live range for " ; cout << " warning: no live range for " ;
@ -221,7 +221,73 @@ void PhyRegAlloc::updateMachineCode()
for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
cout << endl << "BB "; printValue( *BBI); cout << ": "; // get the iterator for machine instructions
MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin();
// iterate over all the machine instructions in BB
for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
MachineInstr *const MInst = *MInstIterator;
//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
MachineOperand& Op = MInst->getOperand(OpNum);
if( Op.getOperandType() == MachineOperand::MO_VirtualRegister ||
Op.getOperandType() == MachineOperand::MO_CCRegister) {
const Value *const Val = Op.getVRegValue();
// delete this condition checking later (must assert if Val is null)
if( !Val ) {
cout << "Error: NULL Value found in instr." << endl;
continue;
}
assert( Val && "Value is NULL");
const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
if ( !LR ) {
if( ! ( (Val->getType())->isLabelType() ||
(Val->getValueType() == Value::ConstantVal) ) ) {
cout << "Warning: No LiveRange for: ";
printValue( Val); cout << endl;
}
//assert( LR && "No LR found for Value");
continue;
}
unsigned RCID = (LR->getRegClass())->getID();
Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
}
}
}
}
}
void PhyRegAlloc::printMachineCode()
{
cout << endl << ";************** Method ";
cout << Meth->getName() << " *****************" << endl;
Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
cout << endl ; printLabel( *BBI); cout << ": ";
// get the iterator for machine instructions // get the iterator for machine instructions
MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec(); MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
@ -232,8 +298,10 @@ void PhyRegAlloc::updateMachineCode()
MachineInstr *const MInst = *MInstIterator; MachineInstr *const MInst = *MInstIterator;
cout << endl << "\t"; cout << endl << "\t";
cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString; cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) { //for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
@ -247,7 +315,7 @@ void PhyRegAlloc::updateMachineCode()
const Value *const Val = Op.getVRegValue(); const Value *const Val = Op.getVRegValue();
if( !Val ) { if( !Val ) {
cout << "\t<** Value is NULL!!!**>"; cout << "\t<*NULL Value*>";
continue; continue;
} }
assert( Val && "Value is NULL"); assert( Val && "Value is NULL");
@ -255,6 +323,8 @@ void PhyRegAlloc::updateMachineCode()
const LiveRange *const LR = LRI.getLiveRangeForValue(Val); const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
if ( !LR ) { if ( !LR ) {
if( ! ( (Val->getType())->isLabelType() || if( ! ( (Val->getType())->isLabelType() ||
(Val->getValueType() == Value::ConstantVal) ) ) { (Val->getValueType() == Value::ConstantVal) ) ) {
cout << "\t" << "<*No LiveRange for: "; cout << "\t" << "<*No LiveRange for: ";
@ -271,22 +341,50 @@ void PhyRegAlloc::updateMachineCode()
//cout << "Setting reg for value: "; printValue( Val ); //cout << "Setting reg for value: "; printValue( Val );
//cout << endl; //cout << endl;
//Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) ); Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor()); int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum ); cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
} }
else if( Op.getOperandType() == MachineOperand:: MO_MachineRegister) {
cout << "\t" << "%"<< MRI.getUnifiedRegName( Op.getMachineRegNum() );
}
else if( Op.getOperandType() == MachineOperand::MO_PCRelativeDisp ) {
const Value *const Val = Op.getVRegValue () ;
if( !Val ) {
cout << "\t<*NULL Value*>";
continue;
}
if( (Val->getValueType() == Value::BasicBlockVal))
{ cout << "\t"; printLabel( Op.getVRegValue () ); }
else { cout << "\t"; printValue( Val ); }
}
else else
cout << "\t" << Op; // use dump field cout << "\t" << Op; // use dump field
} }
} }
cout << endl;
} }
cout << endl;
} }
void PhyRegAlloc::printLabel(const Value *const Val)
{
if( Val->hasName() )
cout << Val->getName();
else
cout << "Label" << Val;
}
@ -328,14 +426,16 @@ void PhyRegAlloc::allocateRegisters()
} }
MRI.colorArgs(Meth, LRI); // color method args MRI.colorArgs(Meth, LRI); // color method args
MRI.colorCallArgs(CallInstrList, LRI, AddedInstrMap); // color call args of call instrns // color call args of call instrns
MRI.colorCallArgs(CallInstrList, LRI, AddedInstrMap);
// color all register classes // color all register classes
for( unsigned int rc=0; rc < NumOfRegClasses ; rc++) for( unsigned int rc=0; rc < NumOfRegClasses ; rc++)
RegClassList[ rc ]->colorAllRegs(); RegClassList[ rc ]->colorAllRegs();
updateMachineCode(); //updateMachineCode();
//PrintMachineInstructions(Meth); PrintMachineInstructions(Meth);
printMachineCode(); // only for DEBUGGING
} }

29
lib/Target/SparcV9/RegAlloc/RegClass.cpp
View File

@ -169,34 +169,21 @@ void RegClass::colorIGNode(IGNode *const Node)
MRC->colorIGNode(Node, IsColorUsedArr); MRC->colorIGNode(Node, IsColorUsedArr);
} }
else { else {
cout << " Node " << Node->getIndex(); if( DEBUG_RA ) {
cout << " already colored with color " << Node->getColor() << endl; cout << " Node " << Node->getIndex();
cout << " already colored with color " << Node->getColor() << endl;
}
} }
if( !Node->hasColor() ) { if( !Node->hasColor() ) {
cout << " Node " << Node->getIndex(); if( DEBUG_RA ) {
cout << " - could not find a color (needs spilling)" << endl; cout << " Node " << Node->getIndex();
cout << " - could not find a color (needs spilling)" << endl;
}
} }
} }
#if 0
if( DEBUG_RA) { // printing code
/* cout << " Node " << Node->getIndex();
if( Node->hasColor() ) {
cout << " colored with color " << Node->getColor() << " [" ;
cout << SparcFloatRegOrder::getRegName(Node->getColor());
if( Node->getTypeID() == Type::DoubleTyID )
cout << "+" << SparcFloatRegOrder::getRegName(Node->getColor()+1);
cout << "]" << endl;
}
*/
// MRC->printReg( Node->getParentLR());
cout << " Node " << Node->getIndex();
if( Node->hasColor() )
cout << " colored with color " << Node->getColor() << endl;
#endif