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Use const with TargetLowering references in a few more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62260 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -542,7 +542,7 @@ void SelectionDAGLegalize::HandleOp(SDValue Op) {
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/// ExpandConstantFP - Expands the ConstantFP node to an integer constant or
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/// ExpandConstantFP - Expands the ConstantFP node to an integer constant or
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/// a load from the constant pool.
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/// a load from the constant pool.
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static SDValue ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP,
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static SDValue ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP,
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SelectionDAG &DAG, TargetLowering &TLI) {
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SelectionDAG &DAG, const TargetLowering &TLI) {
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bool Extend = false;
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bool Extend = false;
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// If a FP immediate is precise when represented as a float and if the
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// If a FP immediate is precise when represented as a float and if the
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@ -591,7 +591,8 @@ static SDValue ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP,
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/// operations.
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/// operations.
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static
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static
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SDValue ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT NVT,
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SDValue ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT NVT,
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SelectionDAG &DAG, TargetLowering &TLI) {
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SelectionDAG &DAG,
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const TargetLowering &TLI) {
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MVT VT = Node->getValueType(0);
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MVT VT = Node->getValueType(0);
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MVT SrcVT = Node->getOperand(1).getValueType();
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MVT SrcVT = Node->getOperand(1).getValueType();
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assert((SrcVT == MVT::f32 || SrcVT == MVT::f64) &&
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assert((SrcVT == MVT::f32 || SrcVT == MVT::f64) &&
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@ -633,7 +634,7 @@ SDValue ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT NVT,
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/// ExpandUnalignedStore - Expands an unaligned store to 2 half-size stores.
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/// ExpandUnalignedStore - Expands an unaligned store to 2 half-size stores.
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static
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static
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SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
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SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
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TargetLowering &TLI) {
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const TargetLowering &TLI) {
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SDValue Chain = ST->getChain();
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SDValue Chain = ST->getChain();
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SDValue Ptr = ST->getBasePtr();
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SDValue Ptr = ST->getBasePtr();
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SDValue Val = ST->getValue();
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SDValue Val = ST->getValue();
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@ -8301,7 +8302,7 @@ SDValue SelectionDAGLegalize::WidenVectorOp(SDValue Op, MVT WidenVT) {
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// Width: Preferred width of element type
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// Width: Preferred width of element type
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// VVT: Vector value type whose size we must match.
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// VVT: Vector value type whose size we must match.
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// Returns VecEVT and EVT - the vector type and its associated element type
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// Returns VecEVT and EVT - the vector type and its associated element type
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static void FindWidenVecType(TargetLowering &TLI, unsigned Width, MVT VVT,
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static void FindWidenVecType(const TargetLowering &TLI, unsigned Width, MVT VVT,
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MVT& EVT, MVT& VecEVT) {
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MVT& EVT, MVT& VecEVT) {
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// We start with the preferred width, make it a power of 2 and see if
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// We start with the preferred width, make it a power of 2 and see if
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// we can find a vector type of that width. If not, we reduce it by
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// we can find a vector type of that width. If not, we reduce it by
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@ -1886,7 +1886,8 @@ SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
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// VecVT: Vector value type whose size we must match.
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// VecVT: Vector value type whose size we must match.
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// Returns NewVecVT and NewEltVT - the vector type and its associated
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// Returns NewVecVT and NewEltVT - the vector type and its associated
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// element type.
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// element type.
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static void FindAssocWidenVecType(TargetLowering &TLI, unsigned Width, MVT VecVT,
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static void FindAssocWidenVecType(const TargetLowering &TLI, unsigned Width,
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MVT VecVT,
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MVT& NewEltVT, MVT& NewVecVT) {
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MVT& NewEltVT, MVT& NewVecVT) {
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unsigned EltWidth = Width + 1;
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unsigned EltWidth = Width + 1;
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if (TLI.isTypeLegal(VecVT)) {
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if (TLI.isTypeLegal(VecVT)) {
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