compare doubles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30856 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2006-10-10 16:33:47 +00:00
parent fb6abd7dea
commit 0d9fe764df
3 changed files with 16 additions and 3 deletions

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@ -539,10 +539,10 @@ static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
static SDOperand GetCMP(ISD::CondCode CC, SDOperand LHS, SDOperand RHS,
SelectionDAG &DAG) {
MVT::ValueType vt = LHS.getValueType();
assert(vt == MVT::i32 || vt == MVT::f32);
assert(vt == MVT::i32 || vt == MVT::f32 || vt == MVT::f64);
//Note: unordered floating point compares should use a non throwing
//compare.
bool isUnorderedFloat = vt == MVT::f32 &&
bool isUnorderedFloat = (vt == MVT::f32 || vt == MVT::f64) &&
(CC >= ISD::SETUO && CC <= ISD::SETUNE);
assert(!isUnorderedFloat && "Unordered float compares are not supported");

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@ -178,6 +178,10 @@ def fcmpes : InstARM<(ops FPRegs:$a, FPRegs:$b),
"fcmpes $a, $b",
[(armcmp FPRegs:$a, FPRegs:$b)]>;
def fcmped : InstARM<(ops DFPRegs:$a, DFPRegs:$b),
"fcmped $a, $b",
[(armcmp DFPRegs:$a, DFPRegs:$b)]>;
// Floating Point Conversion
// We use bitconvert for moving the data between the register classes.
// The format conversion is done with ARM specific nodes

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@ -3,7 +3,9 @@
; RUN: llvm-as < %s | llc -march=arm | grep moveq &&
; RUN: llvm-as < %s | llc -march=arm | grep movgt &&
; RUN: llvm-as < %s | llc -march=arm | grep movge &&
; RUN: llvm-as < %s | llc -march=arm | grep movle
; RUN: llvm-as < %s | llc -march=arm | grep movle &&
; RUN: llvm-as < %s | llc -march=arm | grep fcmpes &&
; RUN: llvm-as < %s | llc -march=arm | grep fcmped
int %f1(float %a) {
entry:
@ -39,3 +41,10 @@ entry:
%tmp = cast bool %tmp to int ; <int> [#uses=1]
ret int %tmp
}
int %g1(double %a) {
entry:
%tmp = setlt double %a, 1.000000e+00 ; <bool> [#uses=1]
%tmp = cast bool %tmp to int ; <int> [#uses=1]
ret int %tmp
}