[GlobalISel][X86] Add legalizer tests for G_LOAD/G_STORE operations. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307494 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Igor Breger 2017-07-09 07:25:57 +00:00
parent 79b7faac96
commit 0ddcb9877c

View File

@ -0,0 +1,100 @@
# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
--- |
define void @test_memop_s8tos32() {
ret void
}
define void @test_memop_s64() {
ret void
}
...
---
name: test_memop_s8tos32
# ALL-LABEL: name: test_memop_s8tos32
alignment: 4
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
- { id: 2, class: _, preferred-register: '' }
- { id: 3, class: _, preferred-register: '' }
- { id: 4, class: _, preferred-register: '' }
- { id: 5, class: _, preferred-register: '' }
- { id: 6, class: _, preferred-register: '' }
- { id: 7, class: _, preferred-register: '' }
- { id: 8, class: _, preferred-register: '' }
# ALL: %0(p0) = IMPLICIT_DEF
# ALL-NEXT: %1(s8) = G_LOAD %0(p0) :: (load 1)
# ALL-NEXT: %2(s16) = G_LOAD %0(p0) :: (load 2)
# ALL-NEXT: %3(s32) = G_LOAD %0(p0) :: (load 4)
# ALL-NEXT: %4(p0) = G_LOAD %0(p0) :: (load 8)
# ALL-NEXT: %5(s8) = IMPLICIT_DEF
# ALL-NEXT: G_STORE %5(s8), %0(p0) :: (store 1)
# ALL-NEXT: %6(s16) = IMPLICIT_DEF
# ALL-NEXT: G_STORE %6(s16), %0(p0) :: (store 2)
# ALL-NEXT: %7(s32) = IMPLICIT_DEF
# ALL-NEXT: G_STORE %7(s32), %0(p0) :: (store 4)
# ALL-NEXT: %8(p0) = IMPLICIT_DEF
# ALL-NEXT: G_STORE %8(p0), %0(p0) :: (store 8)
body: |
bb.1 (%ir-block.0):
liveins: %rdi
%0(p0) = IMPLICIT_DEF
%1(s8) = G_LOAD %0(p0) :: (load 1)
%2(s16) = G_LOAD %0(p0) :: (load 2)
%3(s32) = G_LOAD %0(p0) :: (load 4)
%4(p0) = G_LOAD %0(p0) :: (load 8)
%5(s8) = IMPLICIT_DEF
G_STORE %5, %0 :: (store 1)
%6(s16) = IMPLICIT_DEF
G_STORE %6, %0 :: (store 2)
%7(s32) = IMPLICIT_DEF
G_STORE %7, %0 :: (store 4)
%8(p0) = IMPLICIT_DEF
G_STORE %8, %0 :: (store 8)
...
---
name: test_memop_s64
# ALL-LABEL: name: test_memop_s64
alignment: 4
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
- { id: 2, class: _, preferred-register: '' }
liveins:
# X64: %0(p0) = IMPLICIT_DEF
# X64-NEXT: %1(s64) = G_LOAD %0(p0) :: (load 8)
# X64-NEXT: %2(s64) = IMPLICIT_DEF
# X64-NEXT: G_STORE %2(s64), %0(p0) :: (store 8)
#
# X32: %0(p0) = IMPLICIT_DEF
# X32-NEXT: %3(s32) = G_LOAD %0(p0) :: (load 8)
# X32-NEXT: %6(s32) = G_CONSTANT i32 4
# X32-NEXT: %5(p0) = G_GEP %0, %6(s32)
# X32-NEXT: %4(s32) = G_LOAD %5(p0) :: (load 8)
# X32-NEXT: %1(s64) = G_MERGE_VALUES %3(s32), %4(s32)
# X32-NEXT: %2(s64) = IMPLICIT_DEF
# X32-NEXT: %7(s32), %8(s32) = G_UNMERGE_VALUES %2(s64)
# X32-NEXT: G_STORE %7(s32), %0(p0) :: (store 8)
# X32-NEXT: %10(s32) = G_CONSTANT i32 4
# X32-NEXT: %9(p0) = G_GEP %0, %10(s32)
# X32-NEXT: G_STORE %8(s32), %9(p0) :: (store 8)
body: |
bb.1 (%ir-block.0):
liveins: %rdi
%0(p0) = IMPLICIT_DEF
%1(s64) = G_LOAD %0(p0) :: (load 8)
%2(s64) = IMPLICIT_DEF
G_STORE %2, %0 :: (store 8)
...