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[Sparc] Constification of TargetMachine arguments
This patch changes the TargetMachine arguments to be const. This is required for {D19265}, and was requested to be done in a separate patch. Patch by Jacob Hansen! Differential Revision: http://reviews.llvm.org/D19797 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268389 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1448,7 +1448,7 @@ static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
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}
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}
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SparcTargetLowering::SparcTargetLowering(TargetMachine &TM,
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SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
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const SparcSubtarget &STI)
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: TargetLowering(TM), Subtarget(&STI) {
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MVT PtrVT = MVT::getIntegerVT(8 * TM.getPointerSize());
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@ -54,7 +54,7 @@ namespace llvm {
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class SparcTargetLowering : public TargetLowering {
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const SparcSubtarget *Subtarget;
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public:
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SparcTargetLowering(TargetMachine &TM, const SparcSubtarget &STI);
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SparcTargetLowering(const TargetMachine &TM, const SparcSubtarget &STI);
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SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
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/// computeKnownBitsForTargetNode - Determine which of the bits specified
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@ -50,7 +50,7 @@ SparcSubtarget &SparcSubtarget::initializeSubtargetDependencies(StringRef CPU,
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}
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SparcSubtarget::SparcSubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, TargetMachine &TM,
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const std::string &FS, const TargetMachine &TM,
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bool is64Bit)
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: SparcGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT), Is64Bit(is64Bit),
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InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
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@ -46,7 +46,7 @@ class SparcSubtarget : public SparcGenSubtargetInfo {
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public:
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SparcSubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, TargetMachine &TM, bool is64bit);
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const std::string &FS, const TargetMachine &TM, bool is64bit);
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const SparcInstrInfo *getInstrInfo() const override { return &InstrInfo; }
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const TargetFrameLowering *getFrameLowering() const override {
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