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machine combiner: fix pretty printer
we used to print UNKNOWN instructions when the instruction to be printer was not yet inserted in any BB: in that case the pretty printer would not be able to compute a TII as the instruction does not belong to any BB or function yet. This patch explicitly passes the TII to the pretty-printer. Differential Revision: https://reviews.llvm.org/D27645 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290228 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1149,10 +1149,11 @@ public:
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//
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// Debugging support
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//
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void print(raw_ostream &OS, bool SkipOpers = false) const;
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void print(raw_ostream &OS, ModuleSlotTracker &MST,
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bool SkipOpers = false) const;
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void dump() const;
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void print(raw_ostream &OS, bool SkipOpers = false,
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const TargetInstrInfo *TII = nullptr) const;
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void print(raw_ostream &OS, ModuleSlotTracker &MST, bool SkipOpers = false,
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const TargetInstrInfo *TII = nullptr) const;
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void dump(const TargetInstrInfo *TII = nullptr) const;
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//===--------------------------------------------------------------------===//
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// Accessors used to build up machine instructions.
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@ -135,7 +135,7 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
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// are tracked in the InstrIdxForVirtReg map depth is looked up in InstrDepth
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for (auto *InstrPtr : InsInstrs) { // for each Use
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unsigned IDepth = 0;
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DEBUG(dbgs() << "NEW INSTR "; InstrPtr->dump(); dbgs() << "\n";);
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DEBUG(dbgs() << "NEW INSTR "; InstrPtr->dump(TII); dbgs() << "\n";);
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for (const MachineOperand &MO : InstrPtr->operands()) {
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// Check for virtual register operand.
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if (!(MO.isReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg())))
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@ -1692,29 +1692,30 @@ void MachineInstr::copyImplicitOps(MachineFunction &MF,
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}
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}
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LLVM_DUMP_METHOD void MachineInstr::dump() const {
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LLVM_DUMP_METHOD void MachineInstr::dump(const TargetInstrInfo *TII) const {
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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dbgs() << " " << *this;
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dbgs() << " ";
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print(dbgs(), false /* SkipOpers */, TII);
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#endif
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}
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void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
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void MachineInstr::print(raw_ostream &OS, bool SkipOpers,
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const TargetInstrInfo *TII) const {
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const Module *M = nullptr;
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if (const MachineBasicBlock *MBB = getParent())
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if (const MachineFunction *MF = MBB->getParent())
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M = MF->getFunction()->getParent();
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ModuleSlotTracker MST(M);
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print(OS, MST, SkipOpers);
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print(OS, MST, SkipOpers, TII);
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}
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void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
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bool SkipOpers) const {
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bool SkipOpers, const TargetInstrInfo *TII) const {
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// We can be a bit tidier if we know the MachineFunction.
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const MachineFunction *MF = nullptr;
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const TargetRegisterInfo *TRI = nullptr;
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const MachineRegisterInfo *MRI = nullptr;
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const TargetInstrInfo *TII = nullptr;
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const TargetIntrinsicInfo *IntrinsicInfo = nullptr;
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if (const MachineBasicBlock *MBB = getParent()) {
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@ -1722,7 +1723,8 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
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if (MF) {
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MRI = &MF->getRegInfo();
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TRI = MF->getSubtarget().getRegisterInfo();
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TII = MF->getSubtarget().getInstrInfo();
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if (!TII)
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TII = MF->getSubtarget().getInstrInfo();
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IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
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}
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}
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@ -7,6 +7,11 @@
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; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=exynos-m2 < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=kryo < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=vulcan < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a57 -debug-only=machine-combiner < %s 2>&1 > /dev/null | FileCheck %s --check-prefix COMBINE-DUMP
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; The machine-combiner debugging dumps should print the new instruction.
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; COMBINE-DUMP: NEW INSTR{{.*}}MADDXrrr
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; COMBINE-DUMP-NOT: NEW INSTR{{.*}}UNKNOWN
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; Make sure that inst-combine fuses the multiply add in the addressing mode of
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; the load.
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