mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-05 02:16:46 +00:00
Add some DL propagation to places that didn't
have it yet. More coming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63673 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
383d7ed915
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0f502f6f44
@ -325,6 +325,10 @@ public:
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return getNode(ISD::CopyToReg, MVT::Other, Chain,
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getRegister(Reg, N.getValueType()), N);
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}
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SDValue getCopyToReg(SDValue Chain, DebugLoc dl, unsigned Reg, SDValue N) {
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return getNode(ISD::CopyToReg, dl, MVT::Other, Chain,
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getRegister(Reg, N.getValueType()), N);
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}
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// This version of the getCopyToReg method takes an extra operand, which
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// indicates that there is potentially an incoming flag value (if Flag is not
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@ -335,6 +339,12 @@ public:
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SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Flag };
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return getNode(ISD::CopyToReg, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
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}
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SDValue getCopyToReg(SDValue Chain, DebugLoc dl, unsigned Reg, SDValue N,
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SDValue Flag) {
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const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
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SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Flag };
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return getNode(ISD::CopyToReg, dl, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
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}
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// Similar to last getCopyToReg() except parameter Reg is a SDValue
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SDValue getCopyToReg(SDValue Chain, SDValue Reg, SDValue N,
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@ -343,12 +353,23 @@ public:
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SDValue Ops[] = { Chain, Reg, N, Flag };
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return getNode(ISD::CopyToReg, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
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}
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SDValue getCopyToReg(SDValue Chain, DebugLoc dl, SDValue Reg, SDValue N,
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SDValue Flag) {
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const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
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SDValue Ops[] = { Chain, Reg, N, Flag };
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return getNode(ISD::CopyToReg, dl, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
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}
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SDValue getCopyFromReg(SDValue Chain, unsigned Reg, MVT VT) {
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const MVT *VTs = getNodeValueTypes(VT, MVT::Other);
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SDValue Ops[] = { Chain, getRegister(Reg, VT) };
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return getNode(ISD::CopyFromReg, VTs, 2, Ops, 2);
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}
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SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, MVT VT) {
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const MVT *VTs = getNodeValueTypes(VT, MVT::Other);
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SDValue Ops[] = { Chain, getRegister(Reg, VT) };
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return getNode(ISD::CopyFromReg, dl, VTs, 2, Ops, 2);
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}
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// This version of the getCopyFromReg method takes an extra operand, which
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// indicates that there is potentially an incoming flag value (if Flag is not
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@ -359,6 +380,12 @@ public:
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SDValue Ops[] = { Chain, getRegister(Reg, VT), Flag };
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return getNode(ISD::CopyFromReg, VTs, 3, Ops, Flag.getNode() ? 3 : 2);
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}
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SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, MVT VT,
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SDValue Flag) {
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const MVT *VTs = getNodeValueTypes(VT, MVT::Other, MVT::Flag);
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SDValue Ops[] = { Chain, getRegister(Reg, VT), Flag };
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return getNode(ISD::CopyFromReg, dl, VTs, 3, Ops, Flag.getNode() ? 3 : 2);
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}
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SDValue getCondCode(ISD::CondCode Cond);
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@ -366,6 +393,9 @@ public:
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/// disappear in the future and most targets don't support it.
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SDValue getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, SDValue STy,
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SDValue Rnd, SDValue Sat, ISD::CvtCode Code);
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SDValue getConvertRndSat(MVT VT, DebugLoc dl, SDValue Val, SDValue DTy,
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SDValue STy,
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SDValue Rnd, SDValue Sat, ISD::CvtCode Code);
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/// getZeroExtendInReg - Return the expression required to zero extend the Op
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/// value assuming it was the smaller SrcTy value.
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@ -464,16 +494,36 @@ public:
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SDValue N5);
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SDValue getMemcpy(SDValue Chain, SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align, bool AlwaysInline,
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const Value *DstSV, uint64_t DstSVOff,
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const Value *SrcSV, uint64_t SrcSVOff) {
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return getMemcpy(Chain, DebugLoc::getUnknownLoc(), Dst, Src, Size, Align,
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AlwaysInline, DstSV, DstSVOff, SrcSV, SrcSVOff);
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}
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SDValue getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align, bool AlwaysInline,
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const Value *DstSV, uint64_t DstSVOff,
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const Value *SrcSV, uint64_t SrcSVOff);
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SDValue getMemmove(SDValue Chain, SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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const Value *DstSV, uint64_t DstOSVff,
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const Value *SrcSV, uint64_t SrcSVOff) {
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return getMemmove(Chain, DebugLoc::getUnknownLoc(), Dst, Src, Size, Align,
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DstSV, DstOSVff, SrcSV, SrcSVOff);
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}
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SDValue getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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const Value *DstSV, uint64_t DstOSVff,
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const Value *SrcSV, uint64_t SrcSVOff);
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SDValue getMemset(SDValue Chain, SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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const Value *DstSV, uint64_t DstSVOff) {
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return getMemset(Chain, DebugLoc::getUnknownLoc(), Dst, Src, Size, Align,
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DstSV, DstSVOff);
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}
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SDValue getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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const Value *DstSV, uint64_t DstSVOff);
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@ -521,6 +571,8 @@ public:
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/// and a source value as input.
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SDValue getVAArg(MVT VT, SDValue Chain, SDValue Ptr,
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SDValue SV);
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SDValue getVAArg(MVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr,
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SDValue SV);
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/// getAtomic - Gets a node for an atomic op, produces result and chain and
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/// takes 3 operands
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@ -1101,7 +1101,7 @@ public:
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/// for another call). If the target chooses to decline an AlwaysInline
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/// request here, legalize will resort to using simple loads and stores.
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virtual SDValue
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EmitTargetCodeForMemcpy(SelectionDAG &DAG,
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EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
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SDValue Chain,
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SDValue Op1, SDValue Op2,
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SDValue Op3, unsigned Align,
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@ -1118,7 +1118,7 @@ public:
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/// SDValue if the target declines to use custom code and a different
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/// lowering strategy should be used.
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virtual SDValue
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EmitTargetCodeForMemmove(SelectionDAG &DAG,
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EmitTargetCodeForMemmove(SelectionDAG &DAG, DebugLoc dl,
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SDValue Chain,
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SDValue Op1, SDValue Op2,
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SDValue Op3, unsigned Align,
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@ -1134,7 +1134,7 @@ public:
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/// SDValue if the target declines to use custom code and a different
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/// lowering strategy should be used.
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virtual SDValue
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EmitTargetCodeForMemset(SelectionDAG &DAG,
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EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
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SDValue Chain,
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SDValue Op1, SDValue Op2,
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SDValue Op3, unsigned Align,
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@ -2927,7 +2927,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
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/// getMemsetValue - Vectorized representation of the memset value
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/// operand.
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static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
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static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
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DebugLoc dl) {
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unsigned NumBits = VT.isVector() ?
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VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
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if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
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@ -2943,11 +2944,11 @@ static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
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}
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const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
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Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
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unsigned Shift = 8;
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for (unsigned i = NumBits; i > 8; i >>= 1) {
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Value = DAG.getNode(ISD::OR, VT,
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DAG.getNode(ISD::SHL, VT, Value,
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Value = DAG.getNode(ISD::OR, dl, VT,
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DAG.getNode(ISD::SHL, dl, VT, Value,
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DAG.getConstant(Shift,
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TLI.getShiftAmountTy())),
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Value);
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@ -2960,7 +2961,7 @@ static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
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/// getMemsetStringVal - Similar to getMemsetValue. Except this is only
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/// used when a memcpy is turned into a memset when the source is a constant
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/// string ptr.
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static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
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static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
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const TargetLowering &TLI,
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std::string &Str, unsigned Offset) {
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// Handle vector with all elements zero.
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@ -2969,7 +2970,7 @@ static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
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return DAG.getConstant(0, VT);
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unsigned NumElts = VT.getVectorNumElements();
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MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
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return DAG.getNode(ISD::BIT_CONVERT, VT,
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return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
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DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
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}
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@ -3104,7 +3105,7 @@ bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
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return true;
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}
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static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
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static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
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SDValue Chain, SDValue Dst,
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SDValue Src, uint64_t Size,
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unsigned Align, bool AlwaysInline,
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@ -3141,15 +3142,15 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
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// We also handle store a vector with all zero's.
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// FIXME: Handle other cases where store of vector immediate is done in
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// a single instruction.
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Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
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Store = DAG.getStore(Chain, Value,
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Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
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Store = DAG.getStore(Chain, dl, Value,
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getMemBasePlusOffset(Dst, DstOff, DAG),
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DstSV, DstSVOff + DstOff, false, DstAlign);
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} else {
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Value = DAG.getLoad(VT, Chain,
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Value = DAG.getLoad(VT, dl, Chain,
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getMemBasePlusOffset(Src, SrcOff, DAG),
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SrcSV, SrcSVOff + SrcOff, false, Align);
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Store = DAG.getStore(Chain, Value,
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Store = DAG.getStore(Chain, dl, Value,
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getMemBasePlusOffset(Dst, DstOff, DAG),
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DstSV, DstSVOff + DstOff, false, DstAlign);
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}
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@ -3158,11 +3159,11 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
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DstOff += VTSize;
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}
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return DAG.getNode(ISD::TokenFactor, MVT::Other,
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return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
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&OutChains[0], OutChains.size());
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}
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static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
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static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
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SDValue Chain, SDValue Dst,
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SDValue Src, uint64_t Size,
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unsigned Align, bool AlwaysInline,
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@ -3194,14 +3195,14 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
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unsigned VTSize = VT.getSizeInBits() / 8;
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SDValue Value, Store;
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Value = DAG.getLoad(VT, Chain,
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Value = DAG.getLoad(VT, dl, Chain,
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getMemBasePlusOffset(Src, SrcOff, DAG),
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SrcSV, SrcSVOff + SrcOff, false, Align);
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LoadValues.push_back(Value);
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LoadChains.push_back(Value.getValue(1));
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SrcOff += VTSize;
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}
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Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
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&LoadChains[0], LoadChains.size());
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OutChains.clear();
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for (unsigned i = 0; i < NumMemOps; i++) {
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@ -3209,18 +3210,18 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
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unsigned VTSize = VT.getSizeInBits() / 8;
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SDValue Value, Store;
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Store = DAG.getStore(Chain, LoadValues[i],
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Store = DAG.getStore(Chain, dl, LoadValues[i],
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getMemBasePlusOffset(Dst, DstOff, DAG),
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DstSV, DstSVOff + DstOff, false, DstAlign);
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OutChains.push_back(Store);
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DstOff += VTSize;
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}
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return DAG.getNode(ISD::TokenFactor, MVT::Other,
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return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
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&OutChains[0], OutChains.size());
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}
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static SDValue getMemsetStores(SelectionDAG &DAG,
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static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
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SDValue Chain, SDValue Dst,
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SDValue Src, uint64_t Size,
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unsigned Align,
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@ -3243,19 +3244,19 @@ static SDValue getMemsetStores(SelectionDAG &DAG,
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for (unsigned i = 0; i < NumMemOps; i++) {
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MVT VT = MemOps[i];
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unsigned VTSize = VT.getSizeInBits() / 8;
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SDValue Value = getMemsetValue(Src, VT, DAG);
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SDValue Store = DAG.getStore(Chain, Value,
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SDValue Value = getMemsetValue(Src, VT, DAG, dl);
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SDValue Store = DAG.getStore(Chain, dl, Value,
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getMemBasePlusOffset(Dst, DstOff, DAG),
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DstSV, DstSVOff + DstOff);
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OutChains.push_back(Store);
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DstOff += VTSize;
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}
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return DAG.getNode(ISD::TokenFactor, MVT::Other,
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return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
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&OutChains[0], OutChains.size());
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}
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SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
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SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
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SDValue Src, SDValue Size,
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unsigned Align, bool AlwaysInline,
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const Value *DstSV, uint64_t DstSVOff,
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@ -3270,7 +3271,7 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
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return Chain;
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SDValue Result =
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getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
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getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
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ConstantSize->getZExtValue(),
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Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
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if (Result.getNode())
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@ -3280,7 +3281,7 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
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// Then check to see if we should lower the memcpy with target-specific
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// code. If the target chooses to do this, this is the next best.
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SDValue Result =
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TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
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TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
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AlwaysInline,
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DstSV, DstSVOff, SrcSV, SrcSVOff);
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if (Result.getNode())
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@ -3290,7 +3291,7 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
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// use a (potentially long) sequence of loads and stores.
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if (AlwaysInline) {
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assert(ConstantSize && "AlwaysInline requires a constant size!");
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return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
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return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
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ConstantSize->getZExtValue(), Align, true,
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DstSV, DstSVOff, SrcSV, SrcSVOff);
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}
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@ -3307,11 +3308,11 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
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TLI.LowerCallTo(Chain, Type::VoidTy,
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false, false, false, false, CallingConv::C, false,
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getExternalSymbol("memcpy", TLI.getPointerTy()),
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Args, *this, DebugLoc::getUnknownLoc());
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Args, *this, dl);
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return CallResult.second;
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}
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SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
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SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
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SDValue Src, SDValue Size,
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unsigned Align,
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const Value *DstSV, uint64_t DstSVOff,
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@ -3326,7 +3327,7 @@ SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
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return Chain;
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SDValue Result =
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getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
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getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
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ConstantSize->getZExtValue(),
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Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
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if (Result.getNode())
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@ -3336,7 +3337,7 @@ SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
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// Then check to see if we should lower the memmove with target-specific
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// code. If the target chooses to do this, this is the next best.
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SDValue Result =
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TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
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TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
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DstSV, DstSVOff, SrcSV, SrcSVOff);
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if (Result.getNode())
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return Result;
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@ -3353,11 +3354,11 @@ SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
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TLI.LowerCallTo(Chain, Type::VoidTy,
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false, false, false, false, CallingConv::C, false,
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getExternalSymbol("memmove", TLI.getPointerTy()),
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Args, *this, DebugLoc::getUnknownLoc());
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Args, *this, dl);
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return CallResult.second;
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}
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SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
|
||||
SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
|
||||
SDValue Src, SDValue Size,
|
||||
unsigned Align,
|
||||
const Value *DstSV, uint64_t DstSVOff) {
|
||||
@ -3371,7 +3372,7 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
|
||||
return Chain;
|
||||
|
||||
SDValue Result =
|
||||
getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
|
||||
getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
|
||||
Align, DstSV, DstSVOff);
|
||||
if (Result.getNode())
|
||||
return Result;
|
||||
@ -3380,7 +3381,7 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
|
||||
// Then check to see if we should lower the memset with target-specific
|
||||
// code. If the target chooses to do this, this is the next best.
|
||||
SDValue Result =
|
||||
TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
|
||||
TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
|
||||
DstSV, DstSVOff);
|
||||
if (Result.getNode())
|
||||
return Result;
|
||||
@ -3393,9 +3394,9 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
|
||||
Args.push_back(Entry);
|
||||
// Extend or truncate the argument to be an i32 value for the call.
|
||||
if (Src.getValueType().bitsGT(MVT::i32))
|
||||
Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
|
||||
Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
|
||||
else
|
||||
Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
|
||||
Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
|
||||
Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
|
||||
Args.push_back(Entry);
|
||||
Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
|
||||
@ -3405,7 +3406,7 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
|
||||
TLI.LowerCallTo(Chain, Type::VoidTy,
|
||||
false, false, false, false, CallingConv::C, false,
|
||||
getExternalSymbol("memset", TLI.getPointerTy()),
|
||||
Args, *this, DebugLoc::getUnknownLoc());
|
||||
Args, *this, dl);
|
||||
return CallResult.second;
|
||||
}
|
||||
|
||||
@ -4043,6 +4044,13 @@ SDValue SelectionDAG::getVAArg(MVT VT,
|
||||
return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
|
||||
}
|
||||
|
||||
SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
|
||||
SDValue Chain, SDValue Ptr,
|
||||
SDValue SV) {
|
||||
SDValue Ops[] = { Chain, Ptr, SV };
|
||||
return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
|
||||
}
|
||||
|
||||
SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
|
||||
const SDUse *Ops, unsigned NumOps) {
|
||||
return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
|
||||
|
@ -1242,7 +1242,7 @@ static SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) {
|
||||
}
|
||||
|
||||
SDValue
|
||||
ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
|
||||
SDValue Chain,
|
||||
SDValue Dst, SDValue Src,
|
||||
SDValue Size, unsigned Align,
|
||||
@ -1279,24 +1279,24 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
while (EmittedNumMemOps < NumMemOps) {
|
||||
for (i = 0;
|
||||
i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) {
|
||||
Loads[i] = DAG.getLoad(VT, Chain,
|
||||
DAG.getNode(ISD::ADD, MVT::i32, Src,
|
||||
Loads[i] = DAG.getLoad(VT, dl, Chain,
|
||||
DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
|
||||
DAG.getConstant(SrcOff, MVT::i32)),
|
||||
SrcSV, SrcSVOff + SrcOff);
|
||||
TFOps[i] = Loads[i].getValue(1);
|
||||
SrcOff += VTSize;
|
||||
}
|
||||
Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, &TFOps[0], i);
|
||||
Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
|
||||
|
||||
for (i = 0;
|
||||
i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) {
|
||||
TFOps[i] = DAG.getStore(Chain, Loads[i],
|
||||
DAG.getNode(ISD::ADD, MVT::i32, Dst,
|
||||
TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
|
||||
DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
|
||||
DAG.getConstant(DstOff, MVT::i32)),
|
||||
DstSV, DstSVOff + DstOff);
|
||||
DstOff += VTSize;
|
||||
}
|
||||
Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, &TFOps[0], i);
|
||||
Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
|
||||
|
||||
EmittedNumMemOps += i;
|
||||
}
|
||||
@ -1316,8 +1316,8 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
VTSize = 1;
|
||||
}
|
||||
|
||||
Loads[i] = DAG.getLoad(VT, Chain,
|
||||
DAG.getNode(ISD::ADD, MVT::i32, Src,
|
||||
Loads[i] = DAG.getLoad(VT, dl, Chain,
|
||||
DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
|
||||
DAG.getConstant(SrcOff, MVT::i32)),
|
||||
SrcSV, SrcSVOff + SrcOff);
|
||||
TFOps[i] = Loads[i].getValue(1);
|
||||
@ -1325,7 +1325,7 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
SrcOff += VTSize;
|
||||
BytesLeft -= VTSize;
|
||||
}
|
||||
Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, &TFOps[0], i);
|
||||
Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
|
||||
|
||||
i = 0;
|
||||
BytesLeft = BytesLeftSave;
|
||||
@ -1338,15 +1338,15 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
VTSize = 1;
|
||||
}
|
||||
|
||||
TFOps[i] = DAG.getStore(Chain, Loads[i],
|
||||
DAG.getNode(ISD::ADD, MVT::i32, Dst,
|
||||
TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
|
||||
DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
|
||||
DAG.getConstant(DstOff, MVT::i32)),
|
||||
DstSV, DstSVOff + DstOff);
|
||||
++i;
|
||||
DstOff += VTSize;
|
||||
BytesLeft -= VTSize;
|
||||
}
|
||||
return DAG.getNode(ISD::TokenFactor, MVT::Other, &TFOps[0], i);
|
||||
return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
|
||||
}
|
||||
|
||||
static SDValue ExpandBIT_CONVERT(SDNode *N, SelectionDAG &DAG) {
|
||||
|
@ -149,7 +149,7 @@ namespace llvm {
|
||||
SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
|
||||
SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG);
|
||||
|
||||
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
|
||||
SDValue Chain,
|
||||
SDValue Dst, SDValue Src,
|
||||
SDValue Size, unsigned Align,
|
||||
|
@ -5610,7 +5610,7 @@ X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
|
||||
}
|
||||
|
||||
SDValue
|
||||
X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
|
||||
X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
|
||||
SDValue Chain,
|
||||
SDValue Dst, SDValue Src,
|
||||
SDValue Size, unsigned Align,
|
||||
@ -5641,12 +5641,10 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
|
||||
Args.push_back(Entry);
|
||||
Entry.Node = Size;
|
||||
Args.push_back(Entry);
|
||||
// FIXME provide DebugLoc info
|
||||
std::pair<SDValue,SDValue> CallResult =
|
||||
LowerCallTo(Chain, Type::VoidTy, false, false, false, false,
|
||||
CallingConv::C, false,
|
||||
DAG.getExternalSymbol(bzeroEntry, IntPtr), Args, DAG,
|
||||
DebugLoc::getUnknownLoc());
|
||||
DAG.getExternalSymbol(bzeroEntry, IntPtr), Args, DAG, dl);
|
||||
return CallResult.second;
|
||||
}
|
||||
|
||||
@ -5696,20 +5694,22 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
|
||||
BytesLeft = SizeVal % UBytes;
|
||||
}
|
||||
|
||||
Chain = DAG.getCopyToReg(Chain, ValReg, DAG.getConstant(Val, AVT),
|
||||
Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
|
||||
InFlag);
|
||||
InFlag = Chain.getValue(1);
|
||||
} else {
|
||||
AVT = MVT::i8;
|
||||
Count = DAG.getIntPtrConstant(SizeVal);
|
||||
Chain = DAG.getCopyToReg(Chain, X86::AL, Src, InFlag);
|
||||
Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
|
||||
InFlag = Chain.getValue(1);
|
||||
}
|
||||
|
||||
Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RCX : X86::ECX,
|
||||
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
|
||||
X86::ECX,
|
||||
Count, InFlag);
|
||||
InFlag = Chain.getValue(1);
|
||||
Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RDI : X86::EDI,
|
||||
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
|
||||
X86::EDI,
|
||||
Dst, InFlag);
|
||||
InFlag = Chain.getValue(1);
|
||||
|
||||
@ -5718,15 +5718,16 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
|
||||
Ops.push_back(Chain);
|
||||
Ops.push_back(DAG.getValueType(AVT));
|
||||
Ops.push_back(InFlag);
|
||||
Chain = DAG.getNode(X86ISD::REP_STOS, Tys, &Ops[0], Ops.size());
|
||||
Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, &Ops[0], Ops.size());
|
||||
|
||||
if (TwoRepStos) {
|
||||
InFlag = Chain.getValue(1);
|
||||
Count = Size;
|
||||
MVT CVT = Count.getValueType();
|
||||
SDValue Left = DAG.getNode(ISD::AND, CVT, Count,
|
||||
SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
|
||||
DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT));
|
||||
Chain = DAG.getCopyToReg(Chain, (CVT == MVT::i64) ? X86::RCX : X86::ECX,
|
||||
Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
|
||||
X86::ECX,
|
||||
Left, InFlag);
|
||||
InFlag = Chain.getValue(1);
|
||||
Tys = DAG.getVTList(MVT::Other, MVT::Flag);
|
||||
@ -5734,15 +5735,15 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
|
||||
Ops.push_back(Chain);
|
||||
Ops.push_back(DAG.getValueType(MVT::i8));
|
||||
Ops.push_back(InFlag);
|
||||
Chain = DAG.getNode(X86ISD::REP_STOS, Tys, &Ops[0], Ops.size());
|
||||
Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, &Ops[0], Ops.size());
|
||||
} else if (BytesLeft) {
|
||||
// Handle the last 1 - 7 bytes.
|
||||
unsigned Offset = SizeVal - BytesLeft;
|
||||
MVT AddrVT = Dst.getValueType();
|
||||
MVT SizeVT = Size.getValueType();
|
||||
|
||||
Chain = DAG.getMemset(Chain,
|
||||
DAG.getNode(ISD::ADD, AddrVT, Dst,
|
||||
Chain = DAG.getMemset(Chain, dl,
|
||||
DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
|
||||
DAG.getConstant(Offset, AddrVT)),
|
||||
Src,
|
||||
DAG.getConstant(BytesLeft, SizeVT),
|
||||
@ -5754,7 +5755,7 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
|
||||
}
|
||||
|
||||
SDValue
|
||||
X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
|
||||
SDValue Chain, SDValue Dst, SDValue Src,
|
||||
SDValue Size, unsigned Align,
|
||||
bool AlwaysInline,
|
||||
@ -5784,13 +5785,16 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
unsigned BytesLeft = SizeVal % UBytes;
|
||||
|
||||
SDValue InFlag(0, 0);
|
||||
Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RCX : X86::ECX,
|
||||
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
|
||||
X86::ECX,
|
||||
Count, InFlag);
|
||||
InFlag = Chain.getValue(1);
|
||||
Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RDI : X86::EDI,
|
||||
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
|
||||
X86::EDI,
|
||||
Dst, InFlag);
|
||||
InFlag = Chain.getValue(1);
|
||||
Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RSI : X86::ESI,
|
||||
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RSI :
|
||||
X86::ESI,
|
||||
Src, InFlag);
|
||||
InFlag = Chain.getValue(1);
|
||||
|
||||
@ -5799,7 +5803,7 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
Ops.push_back(Chain);
|
||||
Ops.push_back(DAG.getValueType(AVT));
|
||||
Ops.push_back(InFlag);
|
||||
SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, Tys, &Ops[0], Ops.size());
|
||||
SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, &Ops[0], Ops.size());
|
||||
|
||||
SmallVector<SDValue, 4> Results;
|
||||
Results.push_back(RepMovs);
|
||||
@ -5809,10 +5813,10 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
MVT DstVT = Dst.getValueType();
|
||||
MVT SrcVT = Src.getValueType();
|
||||
MVT SizeVT = Size.getValueType();
|
||||
Results.push_back(DAG.getMemcpy(Chain,
|
||||
DAG.getNode(ISD::ADD, DstVT, Dst,
|
||||
Results.push_back(DAG.getMemcpy(Chain, dl,
|
||||
DAG.getNode(ISD::ADD, dl, DstVT, Dst,
|
||||
DAG.getConstant(Offset, DstVT)),
|
||||
DAG.getNode(ISD::ADD, SrcVT, Src,
|
||||
DAG.getNode(ISD::ADD, dl, SrcVT, Src,
|
||||
DAG.getConstant(Offset, SrcVT)),
|
||||
DAG.getConstant(BytesLeft, SizeVT),
|
||||
Align, AlwaysInline,
|
||||
@ -5820,7 +5824,8 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
|
||||
SrcSV, SrcSVOff + Offset));
|
||||
}
|
||||
|
||||
return DAG.getNode(ISD::TokenFactor, MVT::Other, &Results[0], Results.size());
|
||||
return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
|
||||
&Results[0], Results.size());
|
||||
}
|
||||
|
||||
SDValue X86TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) {
|
||||
|
Loading…
Reference in New Issue
Block a user