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Continue ARM indexed load refactoring. Multiclass for LDR{B} pre/post indexed

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instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118963 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-11-13 01:07:20 +00:00
parent 64185cc609
commit 0f6e33b0c8
1 changed files with 12 additions and 18 deletions
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30
lib/Target/ARM/ARMInstrInfo.td
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@ -1546,16 +1546,20 @@ def LDRD : AI3ldd<(outs GPR:$dst1, GPR:$dst2), (ins addrmode3:$addr), LdMiscFrm,
[]>, Requires<[IsARM, HasV5TE]>;
// Indexed loads
def LDR_PRE : AI2ldstidx<1, 0, 1, (outs GPR:$Rt, GPR:$Rn_wb),
(ins addrmode2:$addr), IndexModePre, LdFrm, IIC_iLoad_ru,
"ldr", "\t$Rt, $addr!", "$addr.base = $Rn_wb", []> {
let Inst{21} = 1; // W bit (overwrite)
multiclass AI2_ldridx<bit isByte, InstrItinClass itin, string opc> {
def _PRE : AI2ldstidx<1, isByte, 1, (outs GPR:$Rt, GPR:$Rn_wb),
(ins addrmode2:$addr), IndexModePre, LdFrm, itin,
opc, "\t$Rt, $addr!", "$addr.base = $Rn_wb", []> {
let Inst{21} = 1; // W bit (overwrite)
}
def _POST : AI2ldstidx<1, isByte, 0, (outs GPR:$Rt, GPR:$Rn_wb),
(ins GPR:$Rn, am2offset:$offset),
IndexModePost, LdFrm, itin,
opc, "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []>;
}
def LDR_POST : AI2ldstidx<1, 0, 0, (outs GPR:$Rt, GPR:$Rn_wb),
(ins GPR:$Rn, am2offset:$offset), IndexModePost,
LdFrm, IIC_iLoad_ru,
"ldr", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []>;
defm LDR : AI2_ldridx<0, IIC_iLoad_ru, "ldr">;
defm LDRB : AI2_ldridx<1, IIC_iLoad_bh_ru, "ldrb">;
def LDRH_PRE : AI3ldhpr<(outs GPR:$Rt, GPR:$Rn_wb),
(ins addrmode3:$addr), LdMiscFrm, IIC_iLoad_bh_ru,
@ -1565,16 +1569,6 @@ def LDRH_POST : AI3ldhpo<(outs GPR:$Rt, GPR:$Rn_wb),
(ins GPR:$Rn,am3offset:$offset), LdMiscFrm, IIC_iLoad_bh_ru,
"ldrh", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []>;
def LDRB_PRE : AI2ldstidx<1, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
(ins addrmode2:$addr), IndexModePre, LdFrm,
IIC_iLoad_bh_ru,
"ldrb", "\t$Rt, $addr!", "$addr.base = $Rn_wb", []>;
def LDRB_POST : AI2ldstidx<1, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
(ins GPR:$Rn,am2offset:$offset), IndexModePost,
LdFrm, IIC_iLoad_bh_ru,
"ldrb", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []>;
def LDRSH_PRE : AI3ldshpr<(outs GPR:$Rt, GPR:$Rn_wb),
(ins addrmode3:$addr), LdMiscFrm, IIC_iLoad_bh_ru,
"ldrsh", "\t$Rt, $addr!", "$addr.base = $Rn_wb", []>;