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AArch64: don't mask off shift bits when processing JIT relocations.
This should actually make the MCJIT tests pass again on AArch64. I don't know how I missed their failure before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187120 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -331,7 +331,7 @@ void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section,
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// AArch64 code is emitted with .rela relocations. The data already in any
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// bits affected by the relocation on entry is garbage.
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*TargetPtr &= 0xff80001fU;
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*TargetPtr &= 0xffe0001fU;
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// Immediate goes in bits 20:5 of MOVZ/MOVK instruction
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*TargetPtr |= Result >> (48 - 5);
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// Shift must be "lsl #48", in bits 22:21
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@ -344,7 +344,7 @@ void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section,
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// AArch64 code is emitted with .rela relocations. The data already in any
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// bits affected by the relocation on entry is garbage.
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*TargetPtr &= 0xff80001fU;
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*TargetPtr &= 0xffe0001fU;
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// Immediate goes in bits 20:5 of MOVZ/MOVK instruction
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*TargetPtr |= ((Result & 0xffff00000000ULL) >> (32 - 5));
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// Shift must be "lsl #32", in bits 22:21
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@ -356,7 +356,7 @@ void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section,
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// AArch64 code is emitted with .rela relocations. The data already in any
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// bits affected by the relocation on entry is garbage.
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*TargetPtr &= 0xff80001fU;
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*TargetPtr &= 0xffe0001fU;
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// Immediate goes in bits 20:5 of MOVZ/MOVK instruction
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*TargetPtr |= ((Result & 0xffff0000U) >> (16 - 5));
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// Shift must be "lsl #16", in bits 22:2
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@ -368,7 +368,7 @@ void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section,
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// AArch64 code is emitted with .rela relocations. The data already in any
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// bits affected by the relocation on entry is garbage.
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*TargetPtr &= 0xff80001fU;
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*TargetPtr &= 0xffe0001fU;
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// Immediate goes in bits 20:5 of MOVZ/MOVK instruction
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*TargetPtr |= ((Result & 0xffffU) << 5);
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// Shift must be "lsl #0", in bits 22:21.
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