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Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2

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Summary:
r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb.

r250697: http://reviews.llvm.org/rL250697

Reviewers: rmaprath

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D15653

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256115 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Weiming Zhao 2015-12-20 06:41:44 +00:00
parent cfbaf11a0d
commit 116cc72ed4
6 changed files with 20 additions and 13 deletions
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4
lib/Target/ARM/ARMInstrThumb2.td
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@ -2291,8 +2291,8 @@ def t2USAT16: T2SatI<(outs rGPR:$Rd), (ins imm0_15:$sat_imm, rGPR:$Rn),
let Inst{5-4} = 0b00;
}
def : T2Pat<(int_arm_ssat GPR:$a, imm:$pos), (t2SSAT imm:$pos, GPR:$a, 0)>;
def : T2Pat<(int_arm_usat GPR:$a, imm:$pos), (t2USAT imm:$pos, GPR:$a, 0)>;
def : T2Pat<(int_arm_ssat GPR:$a, imm1_32:$pos), (t2SSAT imm1_32:$pos, GPR:$a, 0)>;
def : T2Pat<(int_arm_usat GPR:$a, imm0_31:$pos), (t2USAT imm0_31:$pos, GPR:$a, 0)>;
//===----------------------------------------------------------------------===//
// Shift and rotate Instructions.

25
test/CodeGen/ARM/sat-arith.ll
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@ -1,19 +1,22 @@
; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s
; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s -check-prefix=ARM -check-prefix=CHECK
; RUN: llc -O1 -mtriple=thumbv7-none-none-eabi %s -o - | FileCheck %s -check-prefix=THUMB -check-prefix=CHECK
; CHECK-LABEL: qadd
define i32 @qadd() nounwind {
; CHECK: mov [[R0:.*]], #8
; CHECK: mov [[R1:.*]], #128
; CHECK: qadd [[R0]], [[R1]], [[R0]]
; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
; CHECK-ARM: qadd [[R0]], [[R1]], [[R0]]
; CHECK-THRUMB: qadd [[R0]], [[R0]], [[R1]]
%tmp = call i32 @llvm.arm.qadd(i32 128, i32 8)
ret i32 %tmp
}
; CHECK-LABEL: qsub
define i32 @qsub() nounwind {
; CHECK: mov [[R0:.*]], #8
; CHECK: mov [[R1:.*]], #128
; CHECK: qsub [[R0]], [[R1]], [[R0]]
; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
; CHECK-ARM: qsub [[R0]], [[R1]], [[R0]]
; CHECK-THRUMB: qadd [[R0]], [[R1]], [[R0]]
%tmp = call i32 @llvm.arm.qsub(i32 128, i32 8)
ret i32 %tmp
}
@ -21,7 +24,7 @@ define i32 @qsub() nounwind {
; upper-bound of the immediate argument
; CHECK-LABEL: ssat1
define i32 @ssat1() nounwind {
; CHECK: mov [[R0:.*]], #128
; CHECK: mov{{s?}} [[R0:.*]], #128
; CHECK: ssat [[R1:.*]], #32, [[R0]]
%tmp = call i32 @llvm.arm.ssat(i32 128, i32 32)
ret i32 %tmp
@ -30,7 +33,7 @@ define i32 @ssat1() nounwind {
; lower-bound of the immediate argument
; CHECK-LABEL: ssat2
define i32 @ssat2() nounwind {
; CHECK: mov [[R0:.*]], #128
; CHECK: mov{{s?}} [[R0:.*]], #128
; CHECK: ssat [[R1:.*]], #1, [[R0]]
%tmp = call i32 @llvm.arm.ssat(i32 128, i32 1)
ret i32 %tmp
@ -39,7 +42,7 @@ define i32 @ssat2() nounwind {
; upper-bound of the immediate argument
; CHECK-LABEL: usat1
define i32 @usat1() nounwind {
; CHECK: mov [[R0:.*]], #128
; CHECK: mov{{s?}} [[R0:.*]], #128
; CHECK: usat [[R1:.*]], #31, [[R0]]
%tmp = call i32 @llvm.arm.usat(i32 128, i32 31)
ret i32 %tmp
@ -48,7 +51,7 @@ define i32 @usat1() nounwind {
; lower-bound of the immediate argument
; CHECK-LABEL: usat2
define i32 @usat2() nounwind {
; CHECK: mov [[R0:.*]], #128
; CHECK: mov{{s?}} [[R0:.*]], #128
; CHECK: usat [[R1:.*]], #0, [[R0]]
%tmp = call i32 @llvm.arm.usat(i32 128, i32 0)
ret i32 %tmp

1
test/CodeGen/ARM/ssat-lower.ll
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@ -1,4 +1,5 @@
; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument < lower-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat

1
test/CodeGen/ARM/ssat-upper.ll
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@ -1,4 +1,5 @@
; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument > upper-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat

1
test/CodeGen/ARM/usat-lower.ll
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@ -1,4 +1,5 @@
; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument < lower-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat

1
test/CodeGen/ARM/usat-upper.ll
View File

@ -1,4 +1,5 @@
; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument > upper-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat