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Add support in fast-isel for selecting memset/memcpy/memmove intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144426 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier
parent
6d267449ac
commit
11add26ec2
@ -164,7 +164,8 @@ class ARMFastISel : public FastISel {
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bool SelectFPToSI(const Instruction *I);
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bool SelectSDiv(const Instruction *I);
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bool SelectSRem(const Instruction *I);
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bool SelectCall(const Instruction *I);
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bool SelectCall(const Instruction *I, const char *IntrMemName);
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bool SelectIntrinsicCall(const IntrinsicInst &I);
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bool SelectSelect(const Instruction *I);
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bool SelectRet(const Instruction *I);
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bool SelectTrunc(const Instruction *I);
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@ -1997,12 +1998,13 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) {
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return true;
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}
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bool ARMFastISel::SelectCall(const Instruction *I) {
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bool ARMFastISel::SelectCall(const Instruction *I,
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const char *IntrMemName = 0) {
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const CallInst *CI = cast<CallInst>(I);
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const Value *Callee = CI->getCalledValue();
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// Can't handle inline asm or worry about intrinsics yet.
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if (isa<InlineAsm>(Callee) || isa<IntrinsicInst>(CI)) return false;
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// Can't handle inline asm.
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if (isa<InlineAsm>(Callee)) return false;
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// Only handle global variable Callees.
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const GlobalValue *GV = dyn_cast<GlobalValue>(Callee);
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@ -2044,8 +2046,12 @@ bool ARMFastISel::SelectCall(const Instruction *I) {
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ArgFlags.reserve(CS.arg_size());
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for (ImmutableCallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end();
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i != e; ++i) {
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unsigned Arg = getRegForValue(*i);
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// If we're lowering a memory intrinsic instead of a regular call, skip the
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// last two arguments, which shouldn't be passed to the underlying function.
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if (IntrMemName && e-i <= 2)
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break;
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unsigned Arg = getRegForValue(*i);
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if (Arg == 0)
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return false;
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ISD::ArgFlagsTy Flags;
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@ -2090,14 +2096,16 @@ bool ARMFastISel::SelectCall(const Instruction *I) {
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if(isThumb2)
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// Explicitly adding the predicate here.
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MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(CallOpc)))
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.addGlobalAddress(GV, 0, 0);
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TII.get(CallOpc)));
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else
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// Explicitly adding the predicate here.
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MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(CallOpc))
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.addGlobalAddress(GV, 0, 0));
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TII.get(CallOpc)));
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if (!IntrMemName)
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MIB.addGlobalAddress(GV, 0, 0);
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else
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MIB.addExternalSymbol(IntrMemName, 0);
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// Add implicit physical register uses to the call.
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for (unsigned i = 0, e = RegArgs.size(); i != e; ++i)
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MIB.addReg(RegArgs[i]);
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@ -2112,6 +2120,46 @@ bool ARMFastISel::SelectCall(const Instruction *I) {
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return true;
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}
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bool ARMFastISel::SelectIntrinsicCall(const IntrinsicInst &I) {
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// FIXME: Handle more intrinsics.
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switch (I.getIntrinsicID()) {
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default: return false;
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case Intrinsic::memcpy:
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case Intrinsic::memmove: {
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// FIXME: Small memcpy/memmove's are common enough that we want to do them
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// without a call if possible.
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const MemTransferInst &MTI = cast<MemTransferInst>(I);
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// Don't handle volatile.
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if (MTI.isVolatile())
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return false;
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if (!MTI.getLength()->getType()->isIntegerTy(32))
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return false;
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if (MTI.getSourceAddressSpace() > 255 || MTI.getDestAddressSpace() > 255)
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return false;
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const char *IntrMemName = isa<MemCpyInst>(I) ? "memcpy" : "memmove";
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return SelectCall(&I, IntrMemName);
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}
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case Intrinsic::memset: {
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const MemSetInst &MSI = cast<MemSetInst>(I);
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// Don't handle volatile.
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if (MSI.isVolatile())
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return false;
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if (!MSI.getLength()->getType()->isIntegerTy(32))
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return false;
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if (MSI.getDestAddressSpace() > 255)
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return false;
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return SelectCall(&I, "memset");
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}
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}
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return false;
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}
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bool ARMFastISel::SelectTrunc(const Instruction *I) {
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// The high bits for a type smaller than the register size are assumed to be
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// undefined.
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@ -2235,6 +2283,8 @@ bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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case Instruction::SRem:
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return SelectSRem(I);
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case Instruction::Call:
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if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I))
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return SelectIntrinsicCall(*II);
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return SelectCall(I);
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case Instruction::Select:
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return SelectSelect(I);
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78
test/CodeGen/ARM/fast-isel-intrinsic.ll
Normal file
78
test/CodeGen/ARM/fast-isel-intrinsic.ll
Normal file
@ -0,0 +1,78 @@
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB
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@message1 = global [60 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
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@temp = common global [60 x i8] zeroinitializer, align 1
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define void @t1() nounwind ssp {
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; ARM: t1
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; ARM: ldr r0, LCPI0_0
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; ARM: add r0, r0, #5
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; ARM: movw r1, #64
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; ARM: movw r2, #10
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; ARM: uxtb r1, r1
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; ARM: bl #14
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; THUMB: t1
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; THUMB: ldr.n r0, LCPI0_0
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; THUMB: adds r0, #5
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; THUMB: movs r1, #64
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; THUMB: movt r1, #0
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; THUMB: movs r2, #10
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; THUMB: movt r2, #0
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; THUMB: uxtb r1, r1
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; THUMB: bl _memset
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call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @message1, i32 0, i32 5), i8 64, i32 10, i32 1, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
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define void @t2() nounwind ssp {
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; ARM: t2
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; ARM: ldr r0, LCPI1_0
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; ARM: ldr r0, [r0]
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; ARM: add r1, r0, #4
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; ARM: add r0, r0, #16
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; ARM: movw r2, #10
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; ARM: str r0, [sp] @ 4-byte Spill
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; ARM: mov r0, r1
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; ARM: ldr r1, [sp] @ 4-byte Reload
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; ARM: bl #14
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; THUMB: t2
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; THUMB: ldr.n r0, LCPI1_0
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; THUMB: ldr r0, [r0]
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; THUMB: adds r1, r0, #4
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; THUMB: adds r0, #16
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; THUMB: movs r2, #10
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; THUMB: movt r2, #0
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; THUMB: mov r0, r1
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; THUMB: bl _memcpy
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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define void @t3() nounwind ssp {
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; ARM: t3
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; ARM: ldr r0, LCPI2_0
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; ARM: ldr r0, [r0]
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; ARM: add r1, r0, #4
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; ARM: add r0, r0, #16
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; ARM: movw r2, #10
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; ARM: mov r0, r1
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; ARM: bl #14
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; THUMB: t3
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; THUMB: ldr.n r0, LCPI2_0
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; THUMB: ldr r0, [r0]
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; THUMB: adds r1, r0, #4
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; THUMB: adds r0, #16
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; THUMB: movs r2, #10
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; THUMB: movt r2, #0
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; THUMB: mov r0, r1
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; THUMB: bl _memmove
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call void @llvm.memmove.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false)
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ret void
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}
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declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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