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Fix bug: Jello/2003-08-15-AllocaAssertion.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7916 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -143,10 +143,12 @@ namespace {
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unsigned VirtReg, unsigned PhysReg);
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/// spillPhysReg - This method spills the specified physical register into
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/// the virtual register slot associated with it.
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/// the virtual register slot associated with it. If OnlyVirtRegs is set to
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/// true, then the request is ignored if the physical register does not
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/// contain a virtual register.
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///
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void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg);
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unsigned PhysReg, bool OnlyVirtRegs = false);
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/// assignVirtToPhysReg - This method updates local state so that we know
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/// that PhysReg is the proper container for VirtReg now. The physical
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@ -259,20 +261,24 @@ void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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/// spillPhysReg - This method spills the specified physical register into the
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/// virtual register slot associated with it.
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/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
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/// then the request is ignored if the physical register does not contain a
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/// virtual register.
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///
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void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg) {
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unsigned PhysReg, bool OnlyVirtRegs) {
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std::map<unsigned, unsigned>::iterator PI = PhysRegsUsed.find(PhysReg);
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if (PI != PhysRegsUsed.end()) { // Only spill it if it's used!
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spillVirtReg(MBB, I, PI->second, PhysReg);
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if (PI->second || !OnlyVirtRegs)
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spillVirtReg(MBB, I, PI->second, PhysReg);
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} else if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg)) {
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// If the selected register aliases any other registers, we must make
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// sure that one of the aliases isn't alive...
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for (unsigned i = 0; AliasSet[i]; ++i) {
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PI = PhysRegsUsed.find(AliasSet[i]);
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if (PI != PhysRegsUsed.end()) // Spill aliased register...
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spillVirtReg(MBB, I, PI->second, AliasSet[i]);
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if (PI->second || !OnlyVirtRegs)
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spillVirtReg(MBB, I, PI->second, AliasSet[i]);
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}
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}
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}
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@ -520,7 +526,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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MI->getOperand(i).opIsDefAndUse()) &&
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MI->getOperand(i).isPhysicalRegister()) {
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unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
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spillPhysReg(MBB, I, Reg); // Spill any existing value in the reg
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spillPhysReg(MBB, I, Reg, true); // Spill any existing value in the reg
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PhysRegsUsed[Reg] = 0; // It is free and reserved now
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PhysRegsUseOrder.push_back(Reg);
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}
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@ -618,7 +624,11 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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<< I->second << "\n";
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assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
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assert(PhysRegsUseOrder.empty() && "Physical regs still allocated?");
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// Clear any physical register which appear live at the end of the basic
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// block, but which do not hold any virtual registers. e.g., the stack
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// pointer.
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PhysRegsUseOrder.clear();
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}
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