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Constants with multiple encodings (ARM):

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An alternative syntax is available for a modified immediate constant that permits the programmer to specify
the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where:

    <byte> is the numeric value of abcdefgh, in the range 0-255
    <rot> is twice the numeric value of rotation, an even number in the range 0-30.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128897 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen 2011-04-05 18:02:46 +00:00
parent b26d8d7c49
commit 12bb2958c4
3 changed files with 9 additions and 8 deletions
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5
lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
View File

@ -136,9 +136,10 @@ static void printSOImm(raw_ostream &O, int64_t V, raw_ostream *CommentStream,
unsigned Rot = ARM_AM::getSOImmValRot(V);
// Print low-level immediate formation info, per
// A5.1.3: "Data-processing operands - Immediate".
// A5.2.3: Data-processing (immediate), and
// A5.2.4: Modified immediate constants in ARM instructions
if (Rot) {
O << "#" << Imm << ", " << Rot;
O << "#" << Imm << ", #" << Rot;
// Pretty printed version.
if (CommentStream)
*CommentStream << (int)ARM_AM::rotr32(Imm, Rot) << "\n";

6
test/MC/ARM/simple-encoding.ll
View File

@ -39,7 +39,7 @@ define i32 @f3(i32 %a, i32 %b) {
define i32 @f4(i32 %a, i32 %b) {
; CHECK: f4
; CHECK: add r0, r0, #254, 28 @ encoding: [0xfe,0x0e,0x80,0xe2]
; CHECK: add r0, r0, #254, #28 @ encoding: [0xfe,0x0e,0x80,0xe2]
; CHECK: @ 4064
; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1]
%add = add nsw i32 %a, 4064
@ -118,7 +118,7 @@ define i32 @f12(i32 %a) {
define i64 @f13() {
; CHECK: f13:
; CHECK: mvn r0, #0 @ encoding: [0x00,0x00,0xe0,0xe3]
; CHECK: mvn r1, #2, 2 @ encoding: [0x02,0x11,0xe0,0xe3]
; CHECK: mvn r1, #2, #2 @ encoding: [0x02,0x11,0xe0,0xe3]
ret i64 9223372036854775807
}
@ -229,7 +229,7 @@ define i32 @f23(i32 %X, i32 %Y) {
define void @f24(i32 %a) {
; CHECK: f24
; CHECK: cmp r0, #1, 16 @ encoding: [0x01,0x08,0x50,0xe3]
; CHECK: cmp r0, #1, #16 @ encoding: [0x01,0x08,0x50,0xe3]
%b = icmp ugt i32 %a, 65536
br i1 %b, label %r, label %r
r:

6
test/MC/Disassembler/ARM/arm-tests.txt
View File

@ -1,6 +1,6 @@
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
# CHECK: addpl r4, pc, #19, 8
# CHECK: addpl r4, pc, #19, #8
0x4c 0x45 0x8f 0x52
# CHECK: b #0
@ -66,7 +66,7 @@
# CHECK: movt r8, #65535
0xff 0x8f 0x4f 0xe3
# CHECK: mvnspl r7, #245, 2
# CHECK: mvnspl r7, #245, #2
0xf5 0x71 0xf0 0x53
# CHECK-NOT: orr r7, r8, r7, rrx #0
@ -143,7 +143,7 @@
# CHECK: msr cpsr_fc, r0
0x00 0xf0 0x29 0xe1
# CHECK: msrmi cpsr_c, #241, 8
# CHECK: msrmi cpsr_c, #241, #8
0xf1 0xf4 0x21 0x43
# CHECK: rsbs r6, r7, r8