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[PPCMIPeephole] Fix splat elimination
Summary: In PPCMIPeephole, when we see two splat instructions, we can't simply do the following transformation: B = Splat A C = Splat B => C = Splat A because B may still be used between these two instructions. Instead, we should make the second Splat a PPC::COPY and let later passes decide whether to remove it or not: B = Splat A C = Splat B => B = Splat A C = COPY B Fixes PR30663. Reviewers: echristo, iteratee, kbarton, nemanjai Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D25493 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283961 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -201,11 +201,13 @@ bool PPCMIPeephole::simplifyCode(void) {
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// Splat fed by another splat - switch the output of the first
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// and remove the second.
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if (SameOpcode) {
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DefMI->getOperand(0).setReg(MI.getOperand(0).getReg());
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DEBUG(dbgs() << "Changing redundant splat to a copy: ");
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DEBUG(MI.dump());
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BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY),
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MI.getOperand(0).getReg())
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.addOperand(MI.getOperand(OpNo));
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ToErase = &MI;
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Simplified = true;
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DEBUG(dbgs() << "Removing redundant splat: ");
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DEBUG(MI.dump());
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}
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// Splat fed by a shift. Usually when we align value to splat into
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// vector element zero.
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24
test/CodeGen/PowerPC/pr30663.ll
Normal file
24
test/CodeGen/PowerPC/pr30663.ll
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@ -0,0 +1,24 @@
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; RUN: llc -O1 < %s | FileCheck %s
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target triple = "powerpc64le-linux-gnu"
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; The second xxspltw should be eliminated.
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; CHECK: xxspltw
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; CHECK-NOT: xxspltw
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define void @Test() {
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bb4:
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%tmp = load <4 x i8>, <4 x i8>* undef
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%tmp8 = bitcast <4 x i8> %tmp to float
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%tmp18 = fmul float %tmp8, undef
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%tmp19 = fsub float 0.000000e+00, %tmp18
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store float %tmp19, float* undef
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%tmp22 = shufflevector <4 x i8> %tmp, <4 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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%tmp23 = bitcast <16 x i8> %tmp22 to <4 x float>
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%tmp25 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> %tmp23, <4 x float> undef)
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%tmp26 = fsub <4 x float> zeroinitializer, %tmp25
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%tmp27 = bitcast <4 x float> %tmp26 to <4 x i32>
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tail call void @llvm.ppc.altivec.stvx(<4 x i32> %tmp27, i8* undef)
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ret void
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}
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declare void @llvm.ppc.altivec.stvx(<4 x i32>, i8*)
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declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>)
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