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The NEONPreAllocPass should never have to assign fixed registers anymore.
This pass can go away entirely soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107892 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -468,40 +468,7 @@ bool NEONPreAllocPass::PreAllocNEONRegisters(MachineBasicBlock &MBB) {
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continue;
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continue;
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if (FormsRegSequence(MI, FirstOpnd, NumRegs, Offset, Stride))
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if (FormsRegSequence(MI, FirstOpnd, NumRegs, Offset, Stride))
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continue;
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continue;
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llvm_unreachable("expected a REG_SEQUENCE");
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MachineBasicBlock::iterator NextI = llvm::next(MBBI);
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for (unsigned R = 0; R < NumRegs; ++R) {
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MachineOperand &MO = MI->getOperand(FirstOpnd + R);
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assert(MO.isReg() && MO.getSubReg() == 0 && "unexpected operand");
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unsigned VirtReg = MO.getReg();
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assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
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"expected a virtual register");
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// For now, just assign a fixed set of adjacent registers.
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// This leaves plenty of room for future improvements.
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static const unsigned NEONDRegs[] = {
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ARM::D0, ARM::D1, ARM::D2, ARM::D3,
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ARM::D4, ARM::D5, ARM::D6, ARM::D7
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};
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MO.setReg(NEONDRegs[Offset + R * Stride]);
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if (MO.isUse()) {
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// Insert a copy from VirtReg.
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TII->copyRegToReg(MBB, MBBI, MO.getReg(), VirtReg,
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ARM::DPRRegisterClass, ARM::DPRRegisterClass,
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DebugLoc());
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if (MO.isKill()) {
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MachineInstr *CopyMI = prior(MBBI);
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CopyMI->findRegisterUseOperand(VirtReg)->setIsKill();
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}
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MO.setIsKill();
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} else if (MO.isDef() && !MO.isDead()) {
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// Add a copy to VirtReg.
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TII->copyRegToReg(MBB, NextI, VirtReg, MO.getReg(),
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ARM::DPRRegisterClass, ARM::DPRRegisterClass,
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DebugLoc());
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}
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}
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}
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}
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return Modified;
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return Modified;
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