From 16fda6982b8fa366db2632d3b1775d71f1fd4eaa Mon Sep 17 00:00:00 2001 From: Johnny Chen Date: Fri, 16 Apr 2010 19:57:21 +0000 Subject: [PATCH] In the same spirit of r101524, which removed the assert() from printAddrMode2OffsetOperand(), this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101529 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 1 - lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp | 1 - test/MC/Disassembler/arm-tests.txt | 3 +++ 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index ddd2ba5c828..88e8d98775c 100644 --- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -555,7 +555,6 @@ void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op, } unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm()); - assert(ImmOffs && "Malformed indexed load / store!"); O << "#" << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO2.getImm())) << ImmOffs; diff --git a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp index 845d7bb085d..bc61a15e7a6 100644 --- a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp @@ -379,7 +379,6 @@ void ARMInstPrinter::printAddrMode3OffsetOperand(const MCInst *MI, } unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm()); - assert(ImmOffs && "Malformed indexed load / store!"); O << '#' << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO2.getImm())) << ImmOffs; diff --git a/test/MC/Disassembler/arm-tests.txt b/test/MC/Disassembler/arm-tests.txt index b3417e51c84..a1e229caebf 100644 --- a/test/MC/Disassembler/arm-tests.txt +++ b/test/MC/Disassembler/arm-tests.txt @@ -21,6 +21,9 @@ # CHECK: ldr r0, [r2], #15 0x0f 0x00 0x92 0xe4 +# CHECK: ldrh r0, [r2], #0 +0xb0 0x00 0xd2 0xe0 + # CHECK: ldrht r0, [r2], #15 0xbf 0x00 0xf2 0xe0