From 1c5b38d20fccf6faf82a1feba4c3b32fd3a177dc Mon Sep 17 00:00:00 2001 From: Sanjoy Das Date: Sun, 21 Feb 2016 17:12:03 +0000 Subject: [PATCH] Fix LLVM's handling and detection of skylake and cannonlake CPUs Summary: - Rename `"skylake"` == SkylakeServerProc to `"skylake-avx512"` - Change `"skylake"` to denote SkylakeClientProc - Fix the detection of cpu family 6 and model 94 to be SkylakeClientProc instead of SkylakeServerProc - Remove the `"cnl"` for CannonLake Reviewers: craig.topper, delena Subscribers: zansari, echristo, qcolombet, RKSimon, spatel, DavidKreitzer, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D17090 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261482 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Support/Host.cpp | 1 + lib/Target/X86/X86.td | 5 ++--- test/CodeGen/X86/slow-unaligned-mem.ll | 18 +++++++++--------- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/lib/Support/Host.cpp b/lib/Support/Host.cpp index ffad1d79ad0..1ca8eac7184 100644 --- a/lib/Support/Host.cpp +++ b/lib/Support/Host.cpp @@ -373,6 +373,7 @@ StringRef sys::getHostCPUName() { // Skylake: case 78: + return "skylake-avx512"; case 94: return "skylake"; diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index 74129149f24..c805fe3dbd9 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -474,7 +474,7 @@ def SKLFeatures : ProcessorFeatures : ProcModel; -def : SkylakeClientProc<"skl">; +def : SkylakeClientProc<"skylake">; // FIXME: define KNL model class KnightsLandingProc : ProcModel : ProcModel; -def : SkylakeServerProc<"skylake">; +def : SkylakeServerProc<"skylake-avx512">; def : SkylakeServerProc<"skx">; // Legacy alias. def CNLFeatures : ProcessorFeatures : ProcModel; def : CannonlakeProc<"cannonlake">; -def : CannonlakeProc<"cnl">; // AMD CPUs. diff --git a/test/CodeGen/X86/slow-unaligned-mem.ll b/test/CodeGen/X86/slow-unaligned-mem.ll index 27cbef681b7..41e9a95bcdd 100644 --- a/test/CodeGen/X86/slow-unaligned-mem.ll +++ b/test/CodeGen/X86/slow-unaligned-mem.ll @@ -14,15 +14,15 @@ ; Intel chips with fast unaligned memory accesses -; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont 2>&1 | FileCheck %s --check-prefix=FAST -; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=nehalem 2>&1 | FileCheck %s --check-prefix=FAST -; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=westmere 2>&1 | FileCheck %s --check-prefix=FAST -; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=sandybridge 2>&1 | FileCheck %s --check-prefix=FAST -; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=ivybridge 2>&1 | FileCheck %s --check-prefix=FAST -; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=haswell 2>&1 | FileCheck %s --check-prefix=FAST -; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=broadwell 2>&1 | FileCheck %s --check-prefix=FAST -; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl 2>&1 | FileCheck %s --check-prefix=FAST -; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=skylake 2>&1 | FileCheck %s --check-prefix=FAST +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont 2>&1 | FileCheck %s --check-prefix=FAST +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=nehalem 2>&1 | FileCheck %s --check-prefix=FAST +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=westmere 2>&1 | FileCheck %s --check-prefix=FAST +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=sandybridge 2>&1 | FileCheck %s --check-prefix=FAST +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=ivybridge 2>&1 | FileCheck %s --check-prefix=FAST +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=haswell 2>&1 | FileCheck %s --check-prefix=FAST +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=broadwell 2>&1 | FileCheck %s --check-prefix=FAST +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl 2>&1 | FileCheck %s --check-prefix=FAST +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=skylake-avx512 2>&1 | FileCheck %s --check-prefix=FAST ; AMD chips with slow unaligned memory accesses