mirror of
https://github.com/RPCSX/llvm.git
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doo de doo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26614 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duraid Madina
parent
49eee4a26f
commit
1ffd41ab99
@ -25,6 +25,16 @@ def SDT_IA64RetFlag : SDTypeProfile<0, 0, []>;
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def retflag : SDNode<"IA64ISD::RET_FLAG", SDT_IA64RetFlag,
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[SDNPHasChain, SDNPOptInFlag]>;
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//===---------
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// Instruction types
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class isA { bit A=1; } // I or M unit
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class isM { bit M=1; } // M unit
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class isI { bit I=1; } // I unit
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class isB { bit B=1; } // B unit
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class isF { bit F=1; } // F unit
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class isLX { bit LX=1; } // I/B
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//===---------
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def u2imm : Operand<i8>;
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@ -105,48 +115,48 @@ def imm64 : PatLeaf<(i64 imm)>;
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def ADD : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"add $dst = $src1, $src2",
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[(set GR:$dst, (add GR:$src1, GR:$src2))]>;
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[(set GR:$dst, (add GR:$src1, GR:$src2))]>, isA;
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def ADD1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"add $dst = $src1, $src2, 1",
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[(set GR:$dst, (add (add GR:$src1, GR:$src2), 1))]>;
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[(set GR:$dst, (add (add GR:$src1, GR:$src2), 1))]>, isA;
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def ADDS : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, s14imm:$imm),
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"adds $dst = $imm, $src1",
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[(set GR:$dst, (add GR:$src1, immSExt14:$imm))]>;
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[(set GR:$dst, (add GR:$src1, immSExt14:$imm))]>, isA;
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def MOVL : AForm_DAG<0x03, 0x0b, (ops GR:$dst, s64imm:$imm),
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"movl $dst = $imm",
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[(set GR:$dst, imm64:$imm)]>;
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[(set GR:$dst, imm64:$imm)]>, isLX;
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def ADDL_GA : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, globaladdress:$imm),
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"addl $dst = $imm, $src1",
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[]>;
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[]>, isA;
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// hmm
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def ADDL_EA : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, calltarget:$imm),
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"addl $dst = $imm, $src1",
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[]>;
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[]>, isA;
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def SUB : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"sub $dst = $src1, $src2",
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[(set GR:$dst, (sub GR:$src1, GR:$src2))]>;
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[(set GR:$dst, (sub GR:$src1, GR:$src2))]>, isA;
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def SUB1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"sub $dst = $src1, $src2, 1",
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[(set GR:$dst, (add (sub GR: $src1, GR:$src2), -1))]>;
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[(set GR:$dst, (add (sub GR: $src1, GR:$src2), -1))]>, isA;
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let isTwoAddress = 1 in {
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def TPCADDIMM22 : AForm<0x03, 0x0b,
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(ops GR:$dst, GR:$src1, s22imm:$imm, PR:$qp),
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"($qp) add $dst = $imm, $dst">;
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"($qp) add $dst = $imm, $dst">, isA;
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def TPCADDS : AForm_DAG<0x03, 0x0b,
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(ops GR:$dst, GR:$src1, s14imm:$imm, PR:$qp),
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"($qp) adds $dst = $imm, $dst",
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[]>;
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[]>, isA;
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def TPCMPIMM8NE : AForm<0x03, 0x0b,
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(ops PR:$dst, PR:$src1, s22imm:$imm, GR:$src2, PR:$qp),
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"($qp) cmp.ne $dst , p0 = $imm, $src2">;
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"($qp) cmp.ne $dst , p0 = $imm, $src2">, isA;
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}
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// zero extend a bool (predicate reg) into an integer reg
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@ -155,66 +165,66 @@ def ZXTb : Pat<(zext PR:$src),
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// normal sign/zero-extends
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def SXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt1 $dst = $src",
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[(set GR:$dst, (sext_inreg GR:$src, i8))]>;
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[(set GR:$dst, (sext_inreg GR:$src, i8))]>, isI;
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def ZXT1 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt1 $dst = $src",
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[(set GR:$dst, (and GR:$src, 255))]>;
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[(set GR:$dst, (and GR:$src, 255))]>, isI;
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def SXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt2 $dst = $src",
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[(set GR:$dst, (sext_inreg GR:$src, i16))]>;
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[(set GR:$dst, (sext_inreg GR:$src, i16))]>, isI;
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def ZXT2 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt2 $dst = $src",
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[(set GR:$dst, (and GR:$src, 65535))]>;
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[(set GR:$dst, (and GR:$src, 65535))]>, isI;
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def SXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "sxt4 $dst = $src",
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[(set GR:$dst, (sext_inreg GR:$src, i32))]>;
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[(set GR:$dst, (sext_inreg GR:$src, i32))]>, isI;
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def ZXT4 : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src), "zxt4 $dst = $src",
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[(set GR:$dst, (and GR:$src, is32ones))]>;
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[(set GR:$dst, (and GR:$src, is32ones))]>, isI;
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// fixme: shrs vs shru?
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def MIX1L : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"mix1.l $dst = $src1, $src2",
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[(set GR:$dst, (or (and GR:$src1, isMIX1Lable),
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(and (srl GR:$src2, (i64 8)), isMIX1Lable)))]>;
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(and (srl GR:$src2, (i64 8)), isMIX1Lable)))]>, isI;
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def MIX2L : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"mix2.l $dst = $src1, $src2",
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[(set GR:$dst, (or (and GR:$src1, isMIX2Lable),
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(and (srl GR:$src2, (i64 16)), isMIX2Lable)))]>;
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(and (srl GR:$src2, (i64 16)), isMIX2Lable)))]>, isI;
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def MIX4L : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"mix4.l $dst = $src1, $src2",
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[(set GR:$dst, (or (and GR:$src1, isMIX4Lable),
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(and (srl GR:$src2, (i64 32)), isMIX4Lable)))]>;
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(and (srl GR:$src2, (i64 32)), isMIX4Lable)))]>, isI;
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def MIX1R : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"mix1.r $dst = $src1, $src2",
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[(set GR:$dst, (or (and (shl GR:$src1, (i64 8)), isMIX1Rable),
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(and GR:$src2, isMIX1Rable)))]>;
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(and GR:$src2, isMIX1Rable)))]>, isI;
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def MIX2R : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"mix2.r $dst = $src1, $src2",
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[(set GR:$dst, (or (and (shl GR:$src1, (i64 16)), isMIX2Rable),
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(and GR:$src2, isMIX2Rable)))]>;
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(and GR:$src2, isMIX2Rable)))]>, isI;
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def MIX4R : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"mix4.r $dst = $src1, $src2",
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[(set GR:$dst, (or (and (shl GR:$src1, (i64 32)), isMIX4Rable),
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(and GR:$src2, isMIX4Rable)))]>;
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(and GR:$src2, isMIX4Rable)))]>, isI;
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def GETFSIGD : AForm_DAG<0x03, 0x0b, (ops GR:$dst, FP:$src),
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"getf.sig $dst = $src",
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[]>;
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[]>, isM;
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def SETFSIGD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, GR:$src),
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"setf.sig $dst = $src",
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[]>;
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[]>, isM;
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def XMALD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
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"xma.l $dst = $src1, $src2, $src3",
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[]>;
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[]>, isF;
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def XMAHD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
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"xma.h $dst = $src1, $src2, $src3",
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[]>;
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[]>, isF;
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def XMAHUD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
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"xma.hu $dst = $src1, $src2, $src3",
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[]>;
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[]>, isF;
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// pseudocode for integer multiplication
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def : Pat<(mul GR:$src1, GR:$src2),
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@ -232,94 +242,94 @@ def : Pat<(mulhu GR:$src1, GR:$src2),
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def AND : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"and $dst = $src1, $src2",
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[(set GR:$dst, (and GR:$src1, GR:$src2))]>;
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[(set GR:$dst, (and GR:$src1, GR:$src2))]>, isA;
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def ANDCM : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"andcm $dst = $src1, $src2",
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[(set GR:$dst, (and GR:$src1, (not GR:$src2)))]>;
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[(set GR:$dst, (and GR:$src1, (not GR:$src2)))]>, isA;
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// TODO: and/andcm/or/xor/add/sub/shift immediate forms
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def OR : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"or $dst = $src1, $src2",
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[(set GR:$dst, (or GR:$src1, GR:$src2))]>;
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[(set GR:$dst, (or GR:$src1, GR:$src2))]>, isA;
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def pOR : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2, PR:$qp),
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"($qp) or $dst = $src1, $src2">;
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"($qp) or $dst = $src1, $src2">, isA;
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// the following are all a bit unfortunate: we throw away the complement
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// of the compare!
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def CMPEQ : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.eq $dst, p0 = $src1, $src2",
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[(set PR:$dst, (seteq GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (seteq GR:$src1, GR:$src2))]>, isA;
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def CMPGT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.gt $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setgt GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (setgt GR:$src1, GR:$src2))]>, isA;
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def CMPGE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.ge $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setge GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (setge GR:$src1, GR:$src2))]>, isA;
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def CMPLT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.lt $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setlt GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (setlt GR:$src1, GR:$src2))]>, isA;
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def CMPLE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.le $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setle GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (setle GR:$src1, GR:$src2))]>, isA;
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def CMPNE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.ne $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setne GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (setne GR:$src1, GR:$src2))]>, isA;
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def CMPLTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.ltu $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setult GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (setult GR:$src1, GR:$src2))]>, isA;
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def CMPGTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.gtu $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setugt GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (setugt GR:$src1, GR:$src2))]>, isA;
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def CMPLEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.leu $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setule GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (setule GR:$src1, GR:$src2))]>, isA;
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def CMPGEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2),
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"cmp.geu $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setuge GR:$src1, GR:$src2))]>;
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[(set PR:$dst, (setuge GR:$src1, GR:$src2))]>, isA;
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// and we do the whole thing again for FP compares!
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def FCMPEQ : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.eq $dst, p0 = $src1, $src2",
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[(set PR:$dst, (seteq FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (seteq FP:$src1, FP:$src2))]>, isF;
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def FCMPGT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.gt $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setgt FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (setgt FP:$src1, FP:$src2))]>, isF;
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def FCMPGE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.ge $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setge FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (setge FP:$src1, FP:$src2))]>, isF;
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def FCMPLT : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.lt $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setlt FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (setlt FP:$src1, FP:$src2))]>, isF;
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def FCMPLE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.le $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setle FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (setle FP:$src1, FP:$src2))]>, isF;
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def FCMPNE : AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.neq $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setne FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (setne FP:$src1, FP:$src2))]>, isF;
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def FCMPLTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.ltu $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setult FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (setult FP:$src1, FP:$src2))]>, isF;
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def FCMPGTU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.gtu $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setugt FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (setugt FP:$src1, FP:$src2))]>, isF;
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def FCMPLEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.leu $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setule FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (setule FP:$src1, FP:$src2))]>, isF;
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def FCMPGEU: AForm_DAG<0x03, 0x0b, (ops PR:$dst, FP:$src1, FP:$src2),
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"fcmp.geu $dst, p0 = $src1, $src2",
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[(set PR:$dst, (setuge FP:$src1, FP:$src2))]>;
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[(set PR:$dst, (setuge FP:$src1, FP:$src2))]>, isF;
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def PCMPEQUNCR0R0 : AForm<0x03, 0x0b, (ops PR:$dst, PR:$qp),
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"($qp) cmp.eq.unc $dst, p0 = r0, r0">;
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"($qp) cmp.eq.unc $dst, p0 = r0, r0">, isA;
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def : Pat<(trunc GR:$src), // truncate i64 to i1
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(CMPNE GR:$src, r0)>; // $src!=0? If so, PR:$dst=true
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let isTwoAddress=1 in {
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def TPCMPEQR0R0 : AForm<0x03, 0x0b, (ops PR:$dst, PR:$bogus, PR:$qp),
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"($qp) cmp.eq $dst, p0 = r0, r0">;
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"($qp) cmp.eq $dst, p0 = r0, r0">, isA;
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def TPCMPNER0R0 : AForm<0x03, 0x0b, (ops PR:$dst, PR:$bogus, PR:$qp),
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"($qp) cmp.ne $dst, p0 = r0, r0">;
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"($qp) cmp.ne $dst, p0 = r0, r0">, isA;
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}
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/* our pseudocode for OR on predicates is:
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@ -384,46 +394,46 @@ def bXOR : Pat<(xor PR:$src1, PR:$src2),
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def XOR : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
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"xor $dst = $src1, $src2",
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[(set GR:$dst, (xor GR:$src1, GR:$src2))]>;
|
||||
[(set GR:$dst, (xor GR:$src1, GR:$src2))]>, isA;
|
||||
|
||||
def SHLADD: AForm_DAG<0x03, 0x0b, (ops GR:$dst,GR:$src1,s64imm:$imm,GR:$src2),
|
||||
"shladd $dst = $src1, $imm, $src2",
|
||||
[(set GR:$dst, (add GR:$src2, (shl GR:$src1, isSHLADDimm:$imm)))]>;
|
||||
[(set GR:$dst, (add GR:$src2, (shl GR:$src1, isSHLADDimm:$imm)))]>, isA;
|
||||
|
||||
def SHL : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
|
||||
"shl $dst = $src1, $src2",
|
||||
[(set GR:$dst, (shl GR:$src1, GR:$src2))]>;
|
||||
[(set GR:$dst, (shl GR:$src1, GR:$src2))]>, isI;
|
||||
|
||||
def SHRU : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
|
||||
"shr.u $dst = $src1, $src2",
|
||||
[(set GR:$dst, (srl GR:$src1, GR:$src2))]>;
|
||||
[(set GR:$dst, (srl GR:$src1, GR:$src2))]>, isI;
|
||||
|
||||
def SHRS : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src1, GR:$src2),
|
||||
"shr $dst = $src1, $src2",
|
||||
[(set GR:$dst, (sra GR:$src1, GR:$src2))]>;
|
||||
[(set GR:$dst, (sra GR:$src1, GR:$src2))]>, isI;
|
||||
|
||||
def MOV : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "mov $dst = $src">;
|
||||
def MOV : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src), "mov $dst = $src">, isA;
|
||||
def FMOV : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"mov $dst = $src">; // XXX: there _is_ no fmov
|
||||
"mov $dst = $src">, isF; // XXX: there _is_ no fmov
|
||||
def PMOV : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src, PR:$qp),
|
||||
"($qp) mov $dst = $src">;
|
||||
"($qp) mov $dst = $src">, isA;
|
||||
|
||||
def SPILL_ALL_PREDICATES_TO_GR : AForm<0x03, 0x0b, (ops GR:$dst),
|
||||
"mov $dst = pr">;
|
||||
"mov $dst = pr">, isI;
|
||||
def FILL_ALL_PREDICATES_FROM_GR : AForm<0x03, 0x0b, (ops GR:$src),
|
||||
"mov pr = $src">;
|
||||
"mov pr = $src">, isI;
|
||||
|
||||
let isTwoAddress = 1 in {
|
||||
def CMOV : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src2, GR:$src, PR:$qp),
|
||||
"($qp) mov $dst = $src">;
|
||||
"($qp) mov $dst = $src">, isA;
|
||||
}
|
||||
|
||||
def PFMOV : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src, PR:$qp),
|
||||
"($qp) mov $dst = $src">;
|
||||
"($qp) mov $dst = $src">, isF;
|
||||
|
||||
let isTwoAddress = 1 in {
|
||||
def CFMOV : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src2, FP:$src, PR:$qp),
|
||||
"($qp) mov $dst = $src">;
|
||||
"($qp) mov $dst = $src">, isF;
|
||||
}
|
||||
|
||||
def SELECTINT : Pat<(select PR:$which, GR:$src1, GR:$src2),
|
||||
@ -464,206 +474,206 @@ def PSEUDO_ALLOC : PseudoInstIA64<(ops GR:$foo), "// PSEUDO_ALLOC">;
|
||||
|
||||
def ALLOC : AForm<0x03, 0x0b,
|
||||
(ops GR:$dst, i8imm:$inputs, i8imm:$locals, i8imm:$outputs, i8imm:$rotating),
|
||||
"alloc $dst = ar.pfs,$inputs,$locals,$outputs,$rotating">;
|
||||
"alloc $dst = ar.pfs,$inputs,$locals,$outputs,$rotating">, isM;
|
||||
|
||||
let isTwoAddress = 1 in {
|
||||
def TCMPNE : AForm<0x03, 0x0b,
|
||||
(ops PR:$dst, PR:$src2, GR:$src3, GR:$src4),
|
||||
"cmp.ne $dst, p0 = $src3, $src4">;
|
||||
"cmp.ne $dst, p0 = $src3, $src4">, isA;
|
||||
|
||||
def TPCMPEQOR : AForm<0x03, 0x0b,
|
||||
(ops PR:$dst, PR:$src2, GR:$src3, GR:$src4, PR:$qp),
|
||||
"($qp) cmp.eq.or $dst, p0 = $src3, $src4">;
|
||||
"($qp) cmp.eq.or $dst, p0 = $src3, $src4">, isA;
|
||||
|
||||
def TPCMPNE : AForm<0x03, 0x0b,
|
||||
(ops PR:$dst, PR:$src2, GR:$src3, GR:$src4, PR:$qp),
|
||||
"($qp) cmp.ne $dst, p0 = $src3, $src4">;
|
||||
"($qp) cmp.ne $dst, p0 = $src3, $src4">, isA;
|
||||
|
||||
def TPCMPEQ : AForm<0x03, 0x0b,
|
||||
(ops PR:$dst, PR:$src2, GR:$src3, GR:$src4, PR:$qp),
|
||||
"($qp) cmp.eq $dst, p0 = $src3, $src4">;
|
||||
"($qp) cmp.eq $dst, p0 = $src3, $src4">, isA;
|
||||
}
|
||||
|
||||
def MOVSIMM14 : AForm<0x03, 0x0b, (ops GR:$dst, s14imm:$imm),
|
||||
"mov $dst = $imm">;
|
||||
"mov $dst = $imm">, isA;
|
||||
def MOVSIMM22 : AForm<0x03, 0x0b, (ops GR:$dst, s22imm:$imm),
|
||||
"mov $dst = $imm">;
|
||||
"mov $dst = $imm">, isA;
|
||||
def MOVLIMM64 : AForm<0x03, 0x0b, (ops GR:$dst, s64imm:$imm),
|
||||
"movl $dst = $imm">;
|
||||
"movl $dst = $imm">, isLX;
|
||||
|
||||
def SHLI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm),
|
||||
"shl $dst = $src1, $imm">;
|
||||
"shl $dst = $src1, $imm">, isI;
|
||||
def SHRUI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm),
|
||||
"shr.u $dst = $src1, $imm">;
|
||||
"shr.u $dst = $src1, $imm">, isI;
|
||||
def SHRSI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm),
|
||||
"shr $dst = $src1, $imm">;
|
||||
"shr $dst = $src1, $imm">, isI;
|
||||
|
||||
def EXTRU : AForm<0x03, 0x0b,
|
||||
(ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2),
|
||||
"extr.u $dst = $src1, $imm1, $imm2">;
|
||||
"extr.u $dst = $src1, $imm1, $imm2">, isI;
|
||||
|
||||
def DEPZ : AForm<0x03, 0x0b,
|
||||
(ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2),
|
||||
"dep.z $dst = $src1, $imm1, $imm2">;
|
||||
"dep.z $dst = $src1, $imm1, $imm2">, isI;
|
||||
|
||||
def PCMPEQOR : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp),
|
||||
"($qp) cmp.eq.or $dst, p0 = $src1, $src2">;
|
||||
"($qp) cmp.eq.or $dst, p0 = $src1, $src2">, isA;
|
||||
def PCMPEQUNC : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp),
|
||||
"($qp) cmp.eq.unc $dst, p0 = $src1, $src2">;
|
||||
"($qp) cmp.eq.unc $dst, p0 = $src1, $src2">, isA;
|
||||
def PCMPNE : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp),
|
||||
"($qp) cmp.ne $dst, p0 = $src1, $src2">;
|
||||
"($qp) cmp.ne $dst, p0 = $src1, $src2">, isA;
|
||||
|
||||
// two destinations!
|
||||
def BCMPEQ : AForm<0x03, 0x0b, (ops PR:$dst1, PR:$dst2, GR:$src1, GR:$src2),
|
||||
"cmp.eq $dst1, dst2 = $src1, $src2">;
|
||||
"cmp.eq $dst1, dst2 = $src1, $src2">, isA;
|
||||
|
||||
def ADDIMM14 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s14imm:$imm),
|
||||
"adds $dst = $imm, $src1">;
|
||||
"adds $dst = $imm, $src1">, isA;
|
||||
|
||||
def ADDIMM22 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s22imm:$imm),
|
||||
"add $dst = $imm, $src1">;
|
||||
"add $dst = $imm, $src1">, isA;
|
||||
def CADDIMM22 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, s22imm:$imm, PR:$qp),
|
||||
"($qp) add $dst = $imm, $src1">;
|
||||
"($qp) add $dst = $imm, $src1">, isA;
|
||||
|
||||
def SUBIMM8 : AForm<0x03, 0x0b, (ops GR:$dst, s8imm:$imm, GR:$src2),
|
||||
"sub $dst = $imm, $src2">;
|
||||
"sub $dst = $imm, $src2">, isA;
|
||||
|
||||
let isStore = 1, noResults = 1 in {
|
||||
def ST1 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
|
||||
"st1 [$dstPtr] = $value">;
|
||||
"st1 [$dstPtr] = $value">, isM;
|
||||
def ST2 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
|
||||
"st2 [$dstPtr] = $value">;
|
||||
"st2 [$dstPtr] = $value">, isM;
|
||||
def ST4 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
|
||||
"st4 [$dstPtr] = $value">;
|
||||
"st4 [$dstPtr] = $value">, isM;
|
||||
def ST8 : AForm<0x03, 0x0b, (ops GR:$dstPtr, GR:$value),
|
||||
"st8 [$dstPtr] = $value">;
|
||||
"st8 [$dstPtr] = $value">, isM;
|
||||
def STF4 : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value),
|
||||
"stfs [$dstPtr] = $value">;
|
||||
"stfs [$dstPtr] = $value">, isM;
|
||||
def STF8 : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value),
|
||||
"stfd [$dstPtr] = $value">;
|
||||
"stfd [$dstPtr] = $value">, isM;
|
||||
def STF_SPILL : AForm<0x03, 0x0b, (ops GR:$dstPtr, FP:$value),
|
||||
"stf.spill [$dstPtr] = $value">;
|
||||
"stf.spill [$dstPtr] = $value">, isM;
|
||||
}
|
||||
|
||||
let isLoad = 1 in {
|
||||
def LD1 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
|
||||
"ld1 $dst = [$srcPtr]">;
|
||||
"ld1 $dst = [$srcPtr]">, isM;
|
||||
def LD2 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
|
||||
"ld2 $dst = [$srcPtr]">;
|
||||
"ld2 $dst = [$srcPtr]">, isM;
|
||||
def LD4 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
|
||||
"ld4 $dst = [$srcPtr]">;
|
||||
"ld4 $dst = [$srcPtr]">, isM;
|
||||
def LD8 : AForm<0x03, 0x0b, (ops GR:$dst, GR:$srcPtr),
|
||||
"ld8 $dst = [$srcPtr]">;
|
||||
"ld8 $dst = [$srcPtr]">, isM;
|
||||
def LDF4 : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr),
|
||||
"ldfs $dst = [$srcPtr]">;
|
||||
"ldfs $dst = [$srcPtr]">, isM;
|
||||
def LDF8 : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr),
|
||||
"ldfd $dst = [$srcPtr]">;
|
||||
"ldfd $dst = [$srcPtr]">, isM;
|
||||
def LDF_FILL : AForm<0x03, 0x0b, (ops FP:$dst, GR:$srcPtr),
|
||||
"ldf.fill $dst = [$srcPtr]">;
|
||||
"ldf.fill $dst = [$srcPtr]">, isM;
|
||||
}
|
||||
|
||||
def POPCNT : AForm_DAG<0x03, 0x0b, (ops GR:$dst, GR:$src),
|
||||
"popcnt $dst = $src",
|
||||
[(set GR:$dst, (ctpop GR:$src))]>;
|
||||
[(set GR:$dst, (ctpop GR:$src))]>, isI;
|
||||
|
||||
// some FP stuff: // TODO: single-precision stuff?
|
||||
def FADD : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
|
||||
"fadd $dst = $src1, $src2",
|
||||
[(set FP:$dst, (fadd FP:$src1, FP:$src2))]>;
|
||||
[(set FP:$dst, (fadd FP:$src1, FP:$src2))]>, isF;
|
||||
def FADDS: AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
|
||||
"fadd.s $dst = $src1, $src2">;
|
||||
"fadd.s $dst = $src1, $src2">, isF;
|
||||
def FSUB : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
|
||||
"fsub $dst = $src1, $src2",
|
||||
[(set FP:$dst, (fsub FP:$src1, FP:$src2))]>;
|
||||
[(set FP:$dst, (fsub FP:$src1, FP:$src2))]>, isF;
|
||||
def FMPY : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2),
|
||||
"fmpy $dst = $src1, $src2",
|
||||
[(set FP:$dst, (fmul FP:$src1, FP:$src2))]>;
|
||||
[(set FP:$dst, (fmul FP:$src1, FP:$src2))]>, isF;
|
||||
def FMA : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
|
||||
"fma $dst = $src1, $src2, $src3",
|
||||
[(set FP:$dst, (fadd (fmul FP:$src1, FP:$src2), FP:$src3))]>;
|
||||
[(set FP:$dst, (fadd (fmul FP:$src1, FP:$src2), FP:$src3))]>, isF;
|
||||
def FMS : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
|
||||
"fms $dst = $src1, $src2, $src3",
|
||||
[(set FP:$dst, (fsub (fmul FP:$src1, FP:$src2), FP:$src3))]>;
|
||||
[(set FP:$dst, (fsub (fmul FP:$src1, FP:$src2), FP:$src3))]>, isF;
|
||||
def FNMA : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
|
||||
"fnma $dst = $src1, $src2, $src3",
|
||||
[(set FP:$dst, (fneg (fadd (fmul FP:$src1, FP:$src2), FP:$src3)))]>;
|
||||
[(set FP:$dst, (fneg (fadd (fmul FP:$src1, FP:$src2), FP:$src3)))]>, isF;
|
||||
def FABS : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fabs $dst = $src",
|
||||
[(set FP:$dst, (fabs FP:$src))]>;
|
||||
[(set FP:$dst, (fabs FP:$src))]>, isF;
|
||||
def FNEG : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fneg $dst = $src",
|
||||
[(set FP:$dst, (fneg FP:$src))]>;
|
||||
[(set FP:$dst, (fneg FP:$src))]>, isF;
|
||||
def FNEGABS : AForm_DAG<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fnegabs $dst = $src",
|
||||
[(set FP:$dst, (fneg (fabs FP:$src)))]>;
|
||||
[(set FP:$dst, (fneg (fabs FP:$src)))]>, isF;
|
||||
|
||||
let isTwoAddress=1 in {
|
||||
def TCFMAS1 : AForm<0x03, 0x0b,
|
||||
(ops FP:$dst, FP:$bogussrc, FP:$src1, FP:$src2, FP:$src3, PR:$qp),
|
||||
"($qp) fma.s1 $dst = $src1, $src2, $src3">;
|
||||
"($qp) fma.s1 $dst = $src1, $src2, $src3">, isF;
|
||||
def TCFMADS0 : AForm<0x03, 0x0b,
|
||||
(ops FP:$dst, FP:$bogussrc, FP:$src1, FP:$src2, FP:$src3, PR:$qp),
|
||||
"($qp) fma.d.s0 $dst = $src1, $src2, $src3">;
|
||||
"($qp) fma.d.s0 $dst = $src1, $src2, $src3">, isF;
|
||||
}
|
||||
|
||||
def CFMAS1 : AForm<0x03, 0x0b,
|
||||
(ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp),
|
||||
"($qp) fma.s1 $dst = $src1, $src2, $src3">;
|
||||
"($qp) fma.s1 $dst = $src1, $src2, $src3">, isF;
|
||||
def CFNMAS1 : AForm<0x03, 0x0b,
|
||||
(ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp),
|
||||
"($qp) fnma.s1 $dst = $src1, $src2, $src3">;
|
||||
"($qp) fnma.s1 $dst = $src1, $src2, $src3">, isF;
|
||||
|
||||
def CFMADS1 : AForm<0x03, 0x0b,
|
||||
(ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp),
|
||||
"($qp) fma.d.s1 $dst = $src1, $src2, $src3">;
|
||||
"($qp) fma.d.s1 $dst = $src1, $src2, $src3">, isF;
|
||||
def CFMADS0 : AForm<0x03, 0x0b,
|
||||
(ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp),
|
||||
"($qp) fma.d.s0 $dst = $src1, $src2, $src3">;
|
||||
"($qp) fma.d.s0 $dst = $src1, $src2, $src3">, isF;
|
||||
def CFNMADS1 : AForm<0x03, 0x0b,
|
||||
(ops FP:$dst, FP:$src1, FP:$src2, FP:$src3, PR:$qp),
|
||||
"($qp) fnma.d.s1 $dst = $src1, $src2, $src3">;
|
||||
"($qp) fnma.d.s1 $dst = $src1, $src2, $src3">, isF;
|
||||
|
||||
def FRCPAS0 : AForm<0x03, 0x0b, (ops FP:$dstFR, PR:$dstPR, FP:$src1, FP:$src2),
|
||||
"frcpa.s0 $dstFR, $dstPR = $src1, $src2">;
|
||||
"frcpa.s0 $dstFR, $dstPR = $src1, $src2">, isF;
|
||||
def FRCPAS1 : AForm<0x03, 0x0b, (ops FP:$dstFR, PR:$dstPR, FP:$src1, FP:$src2),
|
||||
"frcpa.s1 $dstFR, $dstPR = $src1, $src2">;
|
||||
"frcpa.s1 $dstFR, $dstPR = $src1, $src2">, isF;
|
||||
|
||||
def XMAL : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src1, FP:$src2, FP:$src3),
|
||||
"xma.l $dst = $src1, $src2, $src3">;
|
||||
"xma.l $dst = $src1, $src2, $src3">, isF;
|
||||
|
||||
def FCVTXF : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fcvt.xf $dst = $src">;
|
||||
"fcvt.xf $dst = $src">, isF;
|
||||
def FCVTXUF : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fcvt.xuf $dst = $src">;
|
||||
"fcvt.xuf $dst = $src">, isF;
|
||||
def FCVTXUFS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fcvt.xuf.s1 $dst = $src">;
|
||||
"fcvt.xuf.s1 $dst = $src">, isF;
|
||||
def FCVTFX : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fcvt.fx $dst = $src">;
|
||||
"fcvt.fx $dst = $src">, isF;
|
||||
def FCVTFXU : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fcvt.fxu $dst = $src">;
|
||||
"fcvt.fxu $dst = $src">, isF;
|
||||
|
||||
def FCVTFXTRUNC : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fcvt.fx.trunc $dst = $src">;
|
||||
"fcvt.fx.trunc $dst = $src">, isF;
|
||||
def FCVTFXUTRUNC : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fcvt.fxu.trunc $dst = $src">;
|
||||
"fcvt.fxu.trunc $dst = $src">, isF;
|
||||
|
||||
def FCVTFXTRUNCS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fcvt.fx.trunc.s1 $dst = $src">;
|
||||
"fcvt.fx.trunc.s1 $dst = $src">, isF;
|
||||
def FCVTFXUTRUNCS1 : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fcvt.fxu.trunc.s1 $dst = $src">;
|
||||
"fcvt.fxu.trunc.s1 $dst = $src">, isF;
|
||||
|
||||
def FNORMD : AForm<0x03, 0x0b, (ops FP:$dst, FP:$src),
|
||||
"fnorm.d $dst = $src">;
|
||||
"fnorm.d $dst = $src">, isF;
|
||||
|
||||
def GETFD : AForm<0x03, 0x0b, (ops GR:$dst, FP:$src),
|
||||
"getf.d $dst = $src">;
|
||||
"getf.d $dst = $src">, isM;
|
||||
def SETFD : AForm<0x03, 0x0b, (ops FP:$dst, GR:$src),
|
||||
"setf.d $dst = $src">;
|
||||
"setf.d $dst = $src">, isM;
|
||||
|
||||
def GETFSIG : AForm<0x03, 0x0b, (ops GR:$dst, FP:$src),
|
||||
"getf.sig $dst = $src">;
|
||||
"getf.sig $dst = $src">, isM;
|
||||
def SETFSIG : AForm<0x03, 0x0b, (ops FP:$dst, GR:$src),
|
||||
"setf.sig $dst = $src">;
|
||||
"setf.sig $dst = $src">, isM;
|
||||
|
||||
// these four FP<->int conversion patterns need checking/cleaning
|
||||
def SINT_TO_FP : Pat<(sint_to_fp GR:$src),
|
||||
@ -678,11 +688,11 @@ def FP_TO_UINT : Pat<(i64 (fp_to_uint FP:$src)),
|
||||
|
||||
let isTerminator = 1, isBranch = 1, noResults = 1 in {
|
||||
def BRL_NOTCALL : RawForm<0x03, 0xb0, (ops i64imm:$dst),
|
||||
"(p0) brl.cond.sptk $dst">;
|
||||
"(p0) brl.cond.sptk $dst">, isB;
|
||||
def BRLCOND_NOTCALL : RawForm<0x03, 0xb0, (ops PR:$qp, i64imm:$dst),
|
||||
"($qp) brl.cond.sptk $dst">;
|
||||
"($qp) brl.cond.sptk $dst">, isB;
|
||||
def BRCOND_NOTCALL : RawForm<0x03, 0xb0, (ops PR:$qp, GR:$dst),
|
||||
"($qp) br.cond.sptk $dst">;
|
||||
"($qp) br.cond.sptk $dst">, isB;
|
||||
}
|
||||
|
||||
let isCall = 1, noResults = 1, /* isTerminator = 1, isBranch = 1, */
|
||||
@ -703,29 +713,29 @@ let isCall = 1, noResults = 1, /* isTerminator = 1, isBranch = 1, */
|
||||
out0,out1,out2,out3,out4,out5,out6,out7] in {
|
||||
// old pattern call
|
||||
def BRCALL: RawForm<0x03, 0xb0, (ops calltarget:$dst),
|
||||
"br.call.sptk rp = $dst">; // FIXME: teach llvm about branch regs?
|
||||
"br.call.sptk rp = $dst">, isB; // FIXME: teach llvm about branch regs?
|
||||
// new daggy stuff!
|
||||
|
||||
// calls a globaladdress
|
||||
def BRCALL_IPREL_GA : RawForm<0x03, 0xb0, (ops calltarget:$dst),
|
||||
"br.call.sptk rp = $dst">; // FIXME: teach llvm about branch regs?
|
||||
"br.call.sptk rp = $dst">, isB; // FIXME: teach llvm about branch regs?
|
||||
// calls an externalsymbol
|
||||
def BRCALL_IPREL_ES : RawForm<0x03, 0xb0, (ops calltarget:$dst),
|
||||
"br.call.sptk rp = $dst">; // FIXME: teach llvm about branch regs?
|
||||
"br.call.sptk rp = $dst">, isB; // FIXME: teach llvm about branch regs?
|
||||
// calls through a function descriptor
|
||||
def BRCALL_INDIRECT : RawForm<0x03, 0xb0, (ops GR:$branchreg),
|
||||
"br.call.sptk rp = $branchreg">; // FIXME: teach llvm about branch regs?
|
||||
"br.call.sptk rp = $branchreg">, isB; // FIXME: teach llvm about branch regs?
|
||||
def BRLCOND_CALL : RawForm<0x03, 0xb0, (ops PR:$qp, i64imm:$dst),
|
||||
"($qp) brl.cond.call.sptk $dst">;
|
||||
"($qp) brl.cond.call.sptk $dst">, isB;
|
||||
def BRCOND_CALL : RawForm<0x03, 0xb0, (ops PR:$qp, GR:$dst),
|
||||
"($qp) br.cond.call.sptk $dst">;
|
||||
"($qp) br.cond.call.sptk $dst">, isB;
|
||||
}
|
||||
|
||||
// Return branch:
|
||||
let isTerminator = 1, isReturn = 1, noResults = 1 in
|
||||
def RET : AForm_DAG<0x03, 0x0b, (ops),
|
||||
"br.ret.sptk.many rp",
|
||||
[(retflag)]>; // return
|
||||
[(retflag)]>, isB; // return
|
||||
def : Pat<(ret), (RET)>;
|
||||
|
||||
// the evil stop bit of despair
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user