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Allow LiveRangeEdit to be created with a NULL parent.

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The dead code elimination with callbacks is still useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157100 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-05-19 05:25:46 +00:00
parent 791e629dee
commit 20942dcd86
5 changed files with 16 additions and 13 deletions
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11
include/llvm/CodeGen/LiveRangeEdit.h
View File

@ -55,7 +55,7 @@ public:
};
private:
LiveInterval &Parent;
LiveInterval *Parent;
SmallVectorImpl<LiveInterval*> &NewRegs;
MachineRegisterInfo &MRI;
LiveIntervals &LIS;
@ -99,7 +99,7 @@ public:
/// @param vrm Map of virtual registers to physical registers for this
/// function. If NULL, no virtual register map updates will
/// be done. This could be the case if called before Regalloc.
LiveRangeEdit(LiveInterval &parent,
LiveRangeEdit(LiveInterval *parent,
SmallVectorImpl<LiveInterval*> &newRegs,
MachineFunction &MF,
LiveIntervals &lis,
@ -112,8 +112,11 @@ public:
FirstNew(newRegs.size()),
ScannedRemattable(false) {}
LiveInterval &getParent() const { return Parent; }
unsigned getReg() const { return Parent.reg; }
LiveInterval &getParent() const {
assert(Parent && "No parent LiveInterval");
return *Parent;
}
unsigned getReg() const { return getParent().reg; }
/// Iterator for accessing the new registers added by this edit.
typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator;

4
lib/CodeGen/LiveRangeEdit.cpp
View File

@ -54,8 +54,8 @@ bool LiveRangeEdit::checkRematerializable(VNInfo *VNI,
}
void LiveRangeEdit::scanRemattable(AliasAnalysis *aa) {
for (LiveInterval::vni_iterator I = Parent.vni_begin(),
E = Parent.vni_end(); I != E; ++I) {
for (LiveInterval::vni_iterator I = getParent().vni_begin(),
E = getParent().vni_end(); I != E; ++I) {
VNInfo *VNI = *I;
if (VNI->isUnused())
continue;

4
lib/CodeGen/RegAllocBasic.cpp
View File

@ -187,7 +187,7 @@ void RABasic::spillReg(LiveInterval& VirtReg, unsigned PhysReg,
unassign(SpilledVReg, PhysReg);
// Spill the extracted interval.
LiveRangeEdit LRE(SpilledVReg, SplitVRegs, *MF, *LIS, VRM);
LiveRangeEdit LRE(&SpilledVReg, SplitVRegs, *MF, *LIS, VRM);
spiller().spill(LRE);
}
// After extracting segments, the query's results are invalid. But keep the
@ -287,7 +287,7 @@ unsigned RABasic::selectOrSplit(LiveInterval &VirtReg,
DEBUG(dbgs() << "spilling: " << VirtReg << '\n');
if (!VirtReg.isSpillable())
return ~0u;
LiveRangeEdit LRE(VirtReg, SplitVRegs, *MF, *LIS, VRM);
LiveRangeEdit LRE(&VirtReg, SplitVRegs, *MF, *LIS, VRM);
spiller().spill(LRE);
// The live virtual register requesting allocation was spilled, so tell

8
lib/CodeGen/RegAllocGreedy.cpp
View File

@ -1183,7 +1183,7 @@ unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order,
return 0;
// Prepare split editor.
LiveRangeEdit LREdit(VirtReg, NewVRegs, *MF, *LIS, VRM, this);
LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this);
SE->reset(LREdit, SplitSpillMode);
// Assign all edge bundles to the preferred candidate, or NoCand.
@ -1231,7 +1231,7 @@ unsigned RAGreedy::tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order,
assert(&SA->getParent() == &VirtReg && "Live range wasn't analyzed");
unsigned Reg = VirtReg.reg;
bool SingleInstrs = RegClassInfo.isProperSubClass(MRI->getRegClass(Reg));
LiveRangeEdit LREdit(VirtReg, NewVRegs, *MF, *LIS, VRM, this);
LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this);
SE->reset(LREdit, SplitSpillMode);
ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA->getUseBlocks();
for (unsigned i = 0; i != UseBlocks.size(); ++i) {
@ -1512,7 +1512,7 @@ unsigned RAGreedy::tryLocalSplit(LiveInterval &VirtReg, AllocationOrder &Order,
<< '-' << Uses[BestAfter] << ", " << BestDiff
<< ", " << (BestAfter - BestBefore + 1) << " instrs\n");
LiveRangeEdit LREdit(VirtReg, NewVRegs, *MF, *LIS, VRM, this);
LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this);
SE->reset(LREdit);
SE->openIntv();
@ -1644,7 +1644,7 @@ unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg,
// Finally spill VirtReg itself.
NamedRegionTimer T("Spiller", TimerGroupName, TimePassesIsEnabled);
LiveRangeEdit LRE(VirtReg, NewVRegs, *MF, *LIS, VRM, this);
LiveRangeEdit LRE(&VirtReg, NewVRegs, *MF, *LIS, VRM, this);
spiller().spill(LRE);
setStage(NewVRegs.begin(), NewVRegs.end(), RS_Done);

2
lib/CodeGen/RegAllocPBQP.cpp
View File

@ -550,7 +550,7 @@ bool RegAllocPBQP::mapPBQPToRegAlloc(const PBQPRAProblem &problem,
} else if (problem.isSpillOption(vreg, alloc)) {
vregsToAlloc.erase(vreg);
SmallVector<LiveInterval*, 8> newSpills;
LiveRangeEdit LRE(lis->getInterval(vreg), newSpills, *mf, *lis, vrm);
LiveRangeEdit LRE(&lis->getInterval(vreg), newSpills, *mf, *lis, vrm);
spiller->spill(LRE);
DEBUG(dbgs() << "VREG " << vreg << " -> SPILLED (Cost: "