mirror of
https://github.com/RPCSX/llvm.git
synced 2024-11-28 22:20:37 +00:00
[mips] Do not tail-call optimize vararg functions or functions with byval
arguments. This is rather conservative and should be fixed later to be more aggressive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166851 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
4618e0b574
commit
21a9a98b77
@ -2639,19 +2639,16 @@ static unsigned getNextIntArgReg(unsigned Reg) {
|
|||||||
/// IsEligibleForTailCallOptimization - Check whether the call is eligible
|
/// IsEligibleForTailCallOptimization - Check whether the call is eligible
|
||||||
/// for tail call optimization.
|
/// for tail call optimization.
|
||||||
bool MipsTargetLowering::
|
bool MipsTargetLowering::
|
||||||
IsEligibleForTailCallOptimization(CallingConv::ID CalleeCC,
|
IsEligibleForTailCallOptimization(const MipsCC &MipsCCInfo, bool IsVarArg,
|
||||||
unsigned NextStackOffset) const {
|
unsigned NextStackOffset) const {
|
||||||
if (!EnableMipsTailCalls)
|
if (!EnableMipsTailCalls)
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
// Do not tail-call optimize if there is an argument passed on stack.
|
if (MipsCCInfo.hasByValArg() || IsVarArg)
|
||||||
if (IsO32 && (CalleeCC != CallingConv::Fast)) {
|
|
||||||
if (NextStackOffset > 16)
|
|
||||||
return false;
|
|
||||||
} else if (NextStackOffset)
|
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
return true;
|
// Return true if no arguments are passed on stack.
|
||||||
|
return MipsCCInfo.reservedArgArea() == NextStackOffset;
|
||||||
}
|
}
|
||||||
|
|
||||||
/// LowerCall - functions arguments are copied from virtual regs to
|
/// LowerCall - functions arguments are copied from virtual regs to
|
||||||
@ -2690,7 +2687,8 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
|
|||||||
|
|
||||||
// Check if it's really possible to do a tail call.
|
// Check if it's really possible to do a tail call.
|
||||||
if (isTailCall)
|
if (isTailCall)
|
||||||
isTailCall = IsEligibleForTailCallOptimization(CallConv, NextStackOffset);
|
isTailCall = IsEligibleForTailCallOptimization(MipsCCInfo, isVarArg,
|
||||||
|
NextStackOffset);
|
||||||
|
|
||||||
if (isTailCall)
|
if (isTailCall)
|
||||||
++NumTailCalls;
|
++NumTailCalls;
|
||||||
|
@ -274,7 +274,8 @@ namespace llvm {
|
|||||||
|
|
||||||
/// IsEligibleForTailCallOptimization - Check whether the call is eligible
|
/// IsEligibleForTailCallOptimization - Check whether the call is eligible
|
||||||
/// for tail call optimization.
|
/// for tail call optimization.
|
||||||
bool IsEligibleForTailCallOptimization(CallingConv::ID CalleeCC,
|
bool IsEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,
|
||||||
|
bool IsVarArg,
|
||||||
unsigned NextStackOffset) const;
|
unsigned NextStackOffset) const;
|
||||||
|
|
||||||
/// copyByValArg - Copy argument registers which were used to pass a byval
|
/// copyByValArg - Copy argument registers which were used to pass a byval
|
||||||
|
@ -66,9 +66,15 @@ declare i32 @callee4(i32, i32, i32, i32, i32, i32, i32, i32, i32)
|
|||||||
|
|
||||||
define i32 @caller5() nounwind readonly {
|
define i32 @caller5() nounwind readonly {
|
||||||
entry:
|
entry:
|
||||||
|
; PIC32: .ent caller5
|
||||||
; PIC32-NOT: jalr
|
; PIC32-NOT: jalr
|
||||||
|
; PIC32: .end caller5
|
||||||
|
; STATIC32: .ent caller5
|
||||||
; STATIC32-NOT: jal
|
; STATIC32-NOT: jal
|
||||||
|
; STATIC32: .end caller5
|
||||||
|
; N64: .ent caller5
|
||||||
; N64-NOT: jalr
|
; N64-NOT: jalr
|
||||||
|
; N64: .end caller5
|
||||||
|
|
||||||
%0 = load i32* @g0, align 4
|
%0 = load i32* @g0, align 4
|
||||||
%1 = load i32* @g1, align 4
|
%1 = load i32* @g1, align 4
|
||||||
@ -98,3 +104,55 @@ entry:
|
|||||||
ret i32 %add8
|
ret i32 %add8
|
||||||
}
|
}
|
||||||
|
|
||||||
|
declare i32 @callee8(i32, ...)
|
||||||
|
|
||||||
|
define i32 @caller8_0() nounwind {
|
||||||
|
entry:
|
||||||
|
%call = tail call fastcc i32 @caller8_1()
|
||||||
|
ret i32 %call
|
||||||
|
}
|
||||||
|
|
||||||
|
define internal fastcc i32 @caller8_1() nounwind noinline {
|
||||||
|
entry:
|
||||||
|
; PIC32: .ent caller8_1
|
||||||
|
; PIC32: jalr
|
||||||
|
; PIC32: .end caller8_1
|
||||||
|
; STATIC32: .ent caller8_1
|
||||||
|
; STATIC32: jal
|
||||||
|
; STATIC32: .end caller8_1
|
||||||
|
; N64: .ent caller8_1
|
||||||
|
; N64: jalr
|
||||||
|
; N64: .end caller8_1
|
||||||
|
|
||||||
|
%call = tail call i32 (i32, ...)* @callee8(i32 2, i32 1) nounwind
|
||||||
|
ret i32 %call
|
||||||
|
}
|
||||||
|
|
||||||
|
%struct.S = type { [2 x i32] }
|
||||||
|
|
||||||
|
@gs1 = external global %struct.S
|
||||||
|
|
||||||
|
declare i32 @callee9(%struct.S* byval)
|
||||||
|
|
||||||
|
define i32 @caller9_0() nounwind {
|
||||||
|
entry:
|
||||||
|
%call = tail call fastcc i32 @caller9_1()
|
||||||
|
ret i32 %call
|
||||||
|
}
|
||||||
|
|
||||||
|
define internal fastcc i32 @caller9_1() nounwind noinline {
|
||||||
|
entry:
|
||||||
|
; PIC32: .ent caller9_1
|
||||||
|
; PIC32: jalr
|
||||||
|
; PIC32: .end caller9_1
|
||||||
|
; STATIC32: .ent caller9_1
|
||||||
|
; STATIC32: jal
|
||||||
|
; STATIC32: .end caller9_1
|
||||||
|
; N64: .ent caller9_1
|
||||||
|
; N64: jalr
|
||||||
|
; N64: .end caller9_1
|
||||||
|
|
||||||
|
%call = tail call i32 @callee9(%struct.S* byval @gs1) nounwind
|
||||||
|
ret i32 %call
|
||||||
|
}
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user