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Added instruction combine to transform few more negative values addition to subtraction (Part 3)
This patch enables transforms for (x + (~(y | c) + 1) --> x - (y | c) if c is odd Differential Revision: http://reviews.llvm.org/D4210 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211881 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -954,56 +954,70 @@ bool InstCombiner::WillNotOverflowUnsignedAdd(Value *LHS, Value *RHS) {
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return true;
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return false;
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}
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}
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// Checks if any operand is negative and we can convert add to sub.
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// This function checks for following negative patterns
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// ADD(XOR(OR(Z, NOT(C)), C)), 1) == NEG(AND(Z, C))
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// ADD(XOR(AND(Z, C), C), 1) == NEG(OR(Z, ~C)) if C is odd
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// TODO: XOR(AND(Z, C), (C + 1)) == NEG(OR(Z, ~C)) if C is even
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Value *checkForNegativeOperand(BinaryOperator &I,
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InstCombiner::BuilderTy *Builder) {
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Value *LHS = I.getOperand(0), *RHS = I.getOperand(1);
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// This function checks for following negative patterns
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// ADD(XOR(OR(Z, NOT(C)), C)), 1) == NEG(AND(Z, C))
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// ADD(XOR(AND(Z, C), C), 1) == NEG(OR(Z, ~C))
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// XOR(AND(Z, C), (C + 1)) == NEG(OR(Z, ~C)) if C is even
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Value *checkForNegativeOperand(BinaryOperator &I,
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InstCombiner::BuilderTy *Builder) {
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Value *LHS = I.getOperand(0), *RHS = I.getOperand(1);
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// This function creates 2 instructions to replace ADD, we need at least one
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// of LHS or RHS to have one use to ensure benefit in transform.
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if (!LHS->hasOneUse() && !RHS->hasOneUse())
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return nullptr;
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// This function creates 2 instructions to replace ADD, we need at least one
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// of LHS or RHS to have one use to ensure benefit in transform.
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if (!LHS->hasOneUse() && !RHS->hasOneUse())
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return nullptr;
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Value *X = nullptr, *Y = nullptr, *Z = nullptr;
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const APInt *C1 = nullptr, *C2 = nullptr;
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Value *X = nullptr, *Y = nullptr, *Z = nullptr;
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const APInt *C1 = nullptr, *C2 = nullptr;
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// if ONE is on other side, swap
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if (match(RHS, m_Add(m_Value(X), m_One())))
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std::swap(LHS, RHS);
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// if ONE is on other side, swap
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if (match(RHS, m_Add(m_Value(X), m_One())))
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std::swap(LHS, RHS);
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if (match(LHS, m_Add(m_Value(X), m_One()))) {
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// if XOR on other side, swap
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if (match(RHS, m_Xor(m_Value(Y), m_APInt(C1))))
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std::swap(X, RHS);
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if (match(LHS, m_Add(m_Value(X), m_One()))) {
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// if XOR on other side, swap
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if (match(RHS, m_Xor(m_Value(Y), m_APInt(C1))))
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std::swap(X, RHS);
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if (match(X, m_Xor(m_Value(Y), m_APInt(C1)))) {
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// X = XOR(Y, C1), Y = OR(Z, C2), C2 = NOT(C1) ==> X == NOT(AND(Z, C1))
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// ADD(ADD(X, 1), RHS) == ADD(X, ADD(RHS, 1)) == SUB(RHS, AND(Z, C1))
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if (match(Y, m_Or(m_Value(Z), m_APInt(C2))) && (*C2 == ~(*C1))) {
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Value *NewAnd = Builder->CreateAnd(Z, *C1);
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return Builder->CreateSub(RHS, NewAnd, "sub");
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} else if (C1->countTrailingZeros() == 0) {
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// if C1 is ODD and
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// X = XOR(Y, C1), Y = AND(Z, C2), C2 == C1 ==> X == NOT(OR(Z, ~C1))
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// ADD(ADD(X, 1), RHS) == ADD(X, ADD(RHS, 1)) == SUB(RHS, OR(Z, ~C1))
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if (match(Y, m_And(m_Value(Z), m_APInt(C2))) && (*C1 == *C2)) {
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Value *NewOr = Builder->CreateOr(Z, ~(*C1));
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return Builder->CreateSub(RHS, NewOr, "sub");
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}
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}
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}
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}
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if (match(X, m_Xor(m_Value(Y), m_APInt(C1)))) {
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// X = XOR(Y, C1), Y = OR(Z, C2), C2 = NOT(C1) ==> X == NOT(AND(Z, C1))
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// ADD(ADD(X, 1), RHS) == ADD(X, ADD(RHS, 1)) == SUB(RHS, AND(Z, C1))
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if (match(Y, m_Or(m_Value(Z), m_APInt(C2))) && (*C2 == ~(*C1))) {
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Value *NewAnd = Builder->CreateAnd(Z, *C1);
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return Builder->CreateSub(RHS, NewAnd, "sub");
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} else if (match(Y, m_And(m_Value(Z), m_APInt(C2))) && (*C1 == *C2)) {
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// X = XOR(Y, C1), Y = AND(Z, C2), C2 == C1 ==> X == NOT(OR(Z, ~C1))
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// ADD(ADD(X, 1), RHS) == ADD(X, ADD(RHS, 1)) == SUB(RHS, OR(Z, ~C1))
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Value *NewOr = Builder->CreateOr(Z, ~(*C1));
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return Builder->CreateSub(RHS, NewOr, "sub");
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}
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}
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}
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return nullptr;
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}
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// Restore LHS and RHS
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LHS = I.getOperand(0);
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RHS = I.getOperand(1);
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Instruction *InstCombiner::visitAdd(BinaryOperator &I) {
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// if XOR is on other side, swap
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if (match(RHS, m_Xor(m_Value(Y), m_APInt(C1))))
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std::swap(LHS, RHS);
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// C2 is ODD
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// LHS = XOR(Y, C1), Y = AND(Z, C2), C1 == (C2 + 1) => LHS == NEG(OR(Z, ~C2))
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// ADD(LHS, RHS) == SUB(RHS, OR(Z, ~C2))
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if (match(LHS, m_Xor(m_Value(Y), m_APInt(C1))))
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if (C1->countTrailingZeros() == 0)
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if (match(Y, m_And(m_Value(Z), m_APInt(C2))) && *C1 == (*C2 + 1)) {
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Value *NewOr = Builder->CreateOr(Z, ~(*C2));
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return Builder->CreateSub(RHS, NewOr, "sub");
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}
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return nullptr;
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}
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Instruction *InstCombiner::visitAdd(BinaryOperator &I) {
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bool Changed = SimplifyAssociativeOrCommutative(I);
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Value *LHS = I.getOperand(0), *RHS = I.getOperand(1);
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@ -1579,7 +1593,7 @@ Instruction *InstCombiner::visitSub(BinaryOperator &I) {
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match(Op1, m_Trunc(m_PtrToInt(m_Value(RHSOp)))))
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if (Value *Res = OptimizePointerDifference(LHSOp, RHSOp, I.getType()))
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return ReplaceInstUsesWith(I, Res);
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}
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}
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return nullptr;
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}
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@ -87,17 +87,22 @@ define i16 @test9(i16 %a) {
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; CHECK-NEXT: ret i16 %d
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}
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define i32 @test10(i32 %x) {
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%x.not = or i32 %x, -1431655766
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%neg = xor i32 %x.not, 1431655765
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%add = add i32 %x, 1
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; y + (~((x >> 3) & 0x55555555) + 1) -> y - ((x >> 3) & 0x55555555)
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define i32 @test10(i32 %x, i32 %y) {
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%shr = ashr i32 %x, 3
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%shr.not = or i32 %shr, -1431655766
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%neg = xor i32 %shr.not, 1431655765
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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ret i32 %add1
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -1431655766
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; CHECK-NEXT: ret i32 [[AND]]
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; CHECK-NEXT: [[SHR:%[a-z0-9]+]] = ashr i32 %x, 3
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHR]], 1431655765
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
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; CHECK-NEXT: ret i32 [[SUB]]
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}
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; y + (~(x & 0x55555555) + 1) -> y - (x & 0x55555555)
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define i32 @test11(i32 %x, i32 %y) {
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%x.not = or i32 %x, -1431655766
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%neg = xor i32 %x.not, 1431655765
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@ -110,20 +115,20 @@ define i32 @test11(i32 %x, i32 %y) {
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; CHECK-NEXT: ret i32 [[SUB]]
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}
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; (y + 1) + ~(x & 0x55555555) -> y - (x & 0x55555555)
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define i32 @test12(i32 %x, i32 %y) {
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%shr = ashr i32 %x, 3
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%shr.not = or i32 %shr, -1431655766
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%neg = xor i32 %shr.not, 1431655765
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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%add = add nsw i32 %y, 1
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%x.not = or i32 %x, -1431655766
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%neg = xor i32 %x.not, 1431655765
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%add1 = add nsw i32 %add, %neg
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ret i32 %add1
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: [[SHR:%[a-z0-9]+]] = ashr i32 %x, 3
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHR]], 1431655765
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 1431655765
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
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; CHECK-NEXT: ret i32 [[SUB]]
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}
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; y + (~(x & 0x55555556) + 1) -> y - (x & 0x55555556)
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define i32 @test13(i32 %x, i32 %y) {
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%x.not = or i32 %x, -1431655767
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%neg = xor i32 %x.not, 1431655766
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@ -136,43 +141,67 @@ define i32 @test13(i32 %x, i32 %y) {
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; CHECK-NEXT: ret i32 [[SUB]]
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}
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; (y + 1) + ~(x & 0x55555556) -> y - (x & 0x55555556)
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define i32 @test14(i32 %x, i32 %y) {
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%shr = ashr i32 %x, 3
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%shr.not = or i32 %shr, -1431655767
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%neg = xor i32 %shr.not, 1431655766
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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%add = add nsw i32 %y, 1
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%x.not = or i32 %x, -1431655767
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%neg = xor i32 %x.not, 1431655766
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%add1 = add nsw i32 %add, %neg
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ret i32 %add1
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; CHECK-LABEL: @test14(
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; CHECK-NEXT: [[SHR:%[a-z0-9]+]] = ashr i32 %x, 3
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHR]], 1431655766
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 1431655766
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
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; CHECK-NEXT: ret i32 [[SUB]]
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}
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; y + (~(x | 0x55555556) + 1) -> y - (x | 0x55555556)
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define i32 @test15(i32 %x, i32 %y) {
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%x.not = and i32 %x, -1431655767
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%neg = xor i32 %x.not, -1431655767
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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ret i32 %add1
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%x.not = and i32 %x, -1431655767
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%neg = xor i32 %x.not, -1431655767
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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ret i32 %add1
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; CHECK-LABEL: @test15(
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; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 1431655766
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[OR]]
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = or i32 %x, 1431655766
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
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; CHECK-NEXT: ret i32 [[SUB]]
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}
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; (y + 1) + ~(x | 0x55555556) -> y - (x | 0x555555556)
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define i32 @test16(i32 %x, i32 %y) {
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%shr = ashr i32 %x, 3
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%shr.not = and i32 %shr, -1431655767
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%neg = xor i32 %shr.not, -1431655767
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%add = add i32 %y, 1
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%add1 = add i32 %add, %neg
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ret i32 %add1
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%add = add nsw i32 %y, 1
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%x.not = and i32 %x, -1431655767
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%neg = xor i32 %x.not, -1431655767
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%add1 = add nsw i32 %add, %neg
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ret i32 %add1
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; CHECK-LABEL: @test16(
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; CHECK-NEXT: [[SHR:%[a-z0-9]+]] = ashr i32 %x, 3
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; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[SHR]], 1431655766
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[OR]]
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = or i32 %x, 1431655766
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
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; CHECK-NEXT: ret i32 [[SUB]]
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}
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; y + (~(x | 0x55555555) + 1) -> y - (x | 0x55555555)
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define i32 @test17(i32 %x, i32 %y) {
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%x.not = and i32 %x, -1431655766
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%add2 = xor i32 %x.not, -1431655765
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%add1 = add nsw i32 %add2, %y
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ret i32 %add1
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; CHECK-LABEL: @test17(
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = or i32 %x, 1431655765
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
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; CHECK-NEXT: ret i32 [[SUB]]
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}
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; (y + 1) + ~(x | 0x55555555) -> y - (x | 0x55555555)
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define i32 @test18(i32 %x, i32 %y) {
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%add = add nsw i32 %y, 1
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%x.not = and i32 %x, -1431655766
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%neg = xor i32 %x.not, -1431655766
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%add1 = add nsw i32 %add, %neg
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ret i32 %add1
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; CHECK-LABEL: @test18(
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = or i32 %x, 1431655765
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[AND]]
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; CHECK-NEXT: ret i32 [[SUB]]
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}
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