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Revert r247216: "Fix Clang-tidy misc-use-override warnings, other minor fixes"

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This caused build breakges, e.g.
http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/24926

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247226 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hans Wennborg 2015-09-10 00:57:26 +00:00
parent de3869437d
commit 2515069180
9 changed files with 95 additions and 94 deletions
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6
include/llvm/CodeGen/MIRParser/MIRParser.h
View File

@ -1,4 +1,4 @@
//===- MIRParser.h - MIR serialization format parser ------------*- C++ -*-===//
//===- MIRParser.h - MIR serialization format parser ----------------------===//
//
// The LLVM Compiler Infrastructure
//
@ -37,7 +37,7 @@ class MIRParser : public MachineFunctionInitializer {
public:
MIRParser(std::unique_ptr<MIRParserImpl> Impl);
MIRParser(const MIRParser &) = delete;
~MIRParser() override;
~MIRParser();
/// Parse the optional LLVM IR module that's embedded in the MIR file.
///
@ -78,4 +78,4 @@ createMIRParser(std::unique_ptr<MemoryBuffer> Contents, LLVMContext &Context);
} // end namespace llvm
#endif // LLVM_CODEGEN_MIRPARSER_MIRPARSER_H
#endif

9
include/llvm/ExecutionEngine/RuntimeDyld.h
View File

@ -69,8 +69,7 @@ public:
virtual object::OwningBinary<object::ObjectFile>
getObjectForDebug(const object::ObjectFile &Obj) const = 0;
uint64_t
getSectionLoadAddress(const object::SectionRef &Sec) const override;
uint64_t getSectionLoadAddress(const object::SectionRef &Sec) const;
protected:
virtual void anchor();
@ -96,7 +95,7 @@ public:
/// \brief Memory Management.
class MemoryManager {
public:
virtual ~MemoryManager() = default;
virtual ~MemoryManager() {}
/// Allocate a memory block of (at least) the given size suitable for
/// executable code. The SectionID is a unique identifier assigned by the
@ -158,7 +157,7 @@ public:
/// \brief Symbol resolution.
class SymbolResolver {
public:
virtual ~SymbolResolver() = default;
virtual ~SymbolResolver() {}
/// This method returns the address of the specified function or variable.
/// It is used to resolve symbols during module linking.
@ -253,4 +252,4 @@ private:
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_RUNTIMEDYLD_H
#endif

6
include/llvm/Support/raw_ostream.h
View File

@ -507,7 +507,7 @@ public:
explicit raw_svector_ostream(SmallVectorImpl<char> &O) : OS(O) {
SetUnbuffered();
}
~raw_svector_ostream() override = default;
~raw_svector_ostream() override {}
void flush() = delete;
@ -536,9 +536,9 @@ class buffer_ostream : public raw_svector_ostream {
public:
buffer_ostream(raw_ostream &OS) : raw_svector_ostream(Buffer), OS(OS) {}
~buffer_ostream() override { OS << str(); }
~buffer_ostream() { OS << str(); }
};
} // end llvm namespace
#endif // LLVM_SUPPORT_RAW_OSTREAM_H
#endif

10
include/llvm/TableGen/Record.h
View File

@ -58,7 +58,7 @@ public:
RecTyKind getRecTyKind() const { return Kind; }
RecTy(RecTyKind K) : Kind(K) {}
virtual ~RecTy() = default;
virtual ~RecTy() {}
virtual std::string getAsString() const = 0;
void print(raw_ostream &OS) const { OS << getAsString(); }
@ -267,7 +267,7 @@ protected:
explicit Init(InitKind K) : Kind(K) {}
public:
virtual ~Init() = default;
virtual ~Init() {}
/// isComplete - This virtual method should be overridden by values that may
/// not be completely specified yet.
@ -366,7 +366,7 @@ class TypedInit : public Init {
protected:
explicit TypedInit(InitKind K, RecTy *T) : Init(K), Ty(T) {}
~TypedInit() override {
~TypedInit() {
// If this is a DefInit we need to delete the RecordRecTy.
if (getKind() == IK_DefInit)
delete Ty;
@ -1587,6 +1587,6 @@ Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
const std::string &Name, const std::string &Scoper);
} // end llvm namespace
} // End llvm namespace
#endif // LLVM_TABLEGEN_RECORD_H
#endif

4
lib/CodeGen/MIRPrintingPass.cpp
View File

@ -40,7 +40,7 @@ struct MIRPrintingPass : public MachineFunctionPass {
MachineFunctionPass::getAnalysisUsage(AU);
}
bool runOnMachineFunction(MachineFunction &MF) override {
virtual bool runOnMachineFunction(MachineFunction &MF) override {
std::string Str;
raw_string_ostream StrOS(Str);
printMIR(StrOS, MF);
@ -48,7 +48,7 @@ struct MIRPrintingPass : public MachineFunctionPass {
return false;
}
bool doFinalization(Module &M) override {
virtual bool doFinalization(Module &M) override {
printMIR(OS, M);
OS << MachineFunctions;
return false;

15
lib/ExecutionEngine/MCJIT/MCJIT.h
View File

@ -223,13 +223,12 @@ public:
/// FindFunctionNamed - Search all of the active modules to find the function that
/// defines FnName. This is very slow operation and shouldn't be used for
/// general code.
Function *FindFunctionNamed(const char *FnName) override;
virtual Function *FindFunctionNamed(const char *FnName) override;
/// FindGlobalVariableNamed - Search all of the active modules to find the
/// global variable that defines Name. This is very slow operation and
/// shouldn't be used for general code.
GlobalVariable *FindGlobalVariableNamed(const char *Name,
bool AllowInternal = false) override;
/// FindGlobalVariableNamed - Search all of the active modules to find the global variable
/// that defines Name. This is very slow operation and shouldn't be used for
/// general code.
virtual GlobalVariable *FindGlobalVariableNamed(const char *Name, bool AllowInternal = false) override;
/// Sets the object manager that MCJIT should use to avoid compilation.
void setObjectCache(ObjectCache *manager) override;
@ -336,6 +335,6 @@ protected:
bool CheckFunctionsOnly);
};
} // end llvm namespace
} // End llvm namespace
#endif // LLVM_LIB_EXECUTIONENGINE_MCJIT_MCJIT_H
#endif

90
lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
View File

@ -185,14 +185,14 @@ public:
X86AddressSanitizer(const MCSubtargetInfo &STI)
: X86AsmInstrumentation(STI), RepPrefix(false), OrigSPOffset(0) {}
~X86AddressSanitizer() override = default;
virtual ~X86AddressSanitizer() {}
// X86AsmInstrumentation implementation:
void InstrumentAndEmitInstruction(const MCInst &Inst,
OperandVector &Operands,
MCContext &Ctx,
const MCInstrInfo &MII,
MCStreamer &Out) override {
virtual void InstrumentAndEmitInstruction(const MCInst &Inst,
OperandVector &Operands,
MCContext &Ctx,
const MCInstrInfo &MII,
MCStreamer &Out) override {
InstrumentMOVS(Inst, Operands, Ctx, MII, Out);
if (RepPrefix)
EmitInstruction(Out, MCInstBuilder(X86::REP_PREFIX));
@ -506,7 +506,7 @@ public:
X86AddressSanitizer32(const MCSubtargetInfo &STI)
: X86AddressSanitizer(STI) {}
~X86AddressSanitizer32() override = default;
virtual ~X86AddressSanitizer32() {}
unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
@ -535,9 +535,9 @@ public:
OrigSPOffset += 4;
}
void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override {
virtual void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override {
unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i32);
assert(LocalFrameReg != X86::NoRegister);
@ -565,9 +565,9 @@ public:
StoreFlags(Out);
}
void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override {
virtual void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override {
unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i32);
assert(LocalFrameReg != X86::NoRegister);
@ -586,18 +586,18 @@ public:
}
}
void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
bool IsWrite,
const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override;
void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
bool IsWrite,
const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override;
void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
MCStreamer &Out) override;
virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
bool IsWrite,
const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override;
virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
bool IsWrite,
const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override;
virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
MCStreamer &Out) override;
private:
void EmitCallAsanReport(unsigned AccessSize, bool IsWrite, MCContext &Ctx,
@ -763,7 +763,7 @@ public:
X86AddressSanitizer64(const MCSubtargetInfo &STI)
: X86AddressSanitizer(STI) {}
~X86AddressSanitizer64() override = default;
virtual ~X86AddressSanitizer64() {}
unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
@ -792,9 +792,9 @@ public:
OrigSPOffset += 8;
}
void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override {
virtual void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override {
unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i64);
assert(LocalFrameReg != X86::NoRegister);
@ -823,9 +823,9 @@ public:
StoreFlags(Out);
}
void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override {
virtual void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override {
unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i64);
assert(LocalFrameReg != X86::NoRegister);
@ -845,18 +845,18 @@ public:
}
}
void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
bool IsWrite,
const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override;
void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
bool IsWrite,
const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override;
void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
MCStreamer &Out) override;
virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
bool IsWrite,
const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override;
virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
bool IsWrite,
const RegisterContext &RegCtx,
MCContext &Ctx,
MCStreamer &Out) override;
virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
MCStreamer &Out) override;
private:
void EmitAdjustRSP(MCContext &Ctx, MCStreamer &Out, long Offset) {
@ -1080,4 +1080,4 @@ CreateX86AsmInstrumentation(const MCTargetOptions &MCOptions,
return new X86AsmInstrumentation(STI);
}
} // end llvm namespace
} // End llvm namespace

7
lib/Transforms/Instrumentation/SafeStack.cpp
View File

@ -220,11 +220,11 @@ public:
initializeSafeStackPass(*PassRegistry::getPassRegistry());
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<AAResultsWrapperPass>();
}
bool doInitialization(Module &M) override {
virtual bool doInitialization(Module &M) {
DL = &M.getDataLayout();
StackPtrTy = Type::getInt8PtrTy(M.getContext());
@ -235,7 +235,8 @@ public:
return false;
}
bool runOnFunction(Function &F) override;
bool runOnFunction(Function &F);
}; // class SafeStack
Constant *SafeStack::getOrCreateUnsafeStackPtr(Module &M) {

42
utils/TableGen/InstrInfoEmitter.cpp
View File

@ -1,4 +1,4 @@
//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. --*- C++ -*-===//
//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. ------------===//
//
// The LLVM Compiler Infrastructure
//
@ -12,6 +12,7 @@
//
//===----------------------------------------------------------------------===//
#include "CodeGenDAGPatterns.h"
#include "CodeGenSchedule.h"
#include "CodeGenTarget.h"
@ -25,7 +26,6 @@
#include <cstdio>
#include <map>
#include <vector>
using namespace llvm;
namespace {
@ -70,7 +70,7 @@ private:
void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs);
std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst);
};
} // end anonymous namespace
} // End anonymous namespace
static void PrintDefList(const std::vector<Record*> &Uses,
unsigned Num, raw_ostream &OS) {
@ -190,6 +190,7 @@ void InstrInfoEmitter::EmitOperandInfo(raw_ostream &OS,
}
}
/// Initialize data structures for generating operand name mappings.
///
/// \param Operands [out] A map used to generate the OpName enum with operand
@ -256,9 +257,9 @@ void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS,
OS << "OPERAND_LAST";
OS << "\n};\n";
OS << "} // end namespace OpName\n";
OS << "} // end namespace " << Namespace << "\n";
OS << "} // end namespace llvm\n";
OS << "} // End namespace OpName\n";
OS << "} // End namespace " << Namespace << "\n";
OS << "} // End namespace llvm\n";
OS << "#endif //GET_INSTRINFO_OPERAND_ENUM\n";
OS << "#ifdef GET_INSTRINFO_NAMED_OPS\n";
@ -297,8 +298,8 @@ void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS,
OS << " return -1;\n";
}
OS << "}\n";
OS << "} // end namespace " << Namespace << "\n";
OS << "} // end namespace llvm\n";
OS << "} // End namespace " << Namespace << "\n";
OS << "} // End namespace llvm\n";
OS << "#endif //GET_INSTRINFO_NAMED_OPS\n";
}
@ -327,9 +328,9 @@ void InstrInfoEmitter::emitOperandTypesEnum(raw_ostream &OS,
}
OS << " OPERAND_TYPE_LIST_END" << "\n};\n";
OS << "} // end namespace OpTypes\n";
OS << "} // end namespace " << Namespace << "\n";
OS << "} // end namespace llvm\n";
OS << "} // End namespace OpTypes\n";
OS << "} // End namespace " << Namespace << "\n";
OS << "} // End namespace llvm\n";
OS << "#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM\n";
}
@ -418,7 +419,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
<< TargetName << "InstrNameIndices, " << TargetName << "InstrNameData, "
<< NumberedInstructions.size() << ");\n}\n\n";
OS << "} // end llvm namespace \n";
OS << "} // End llvm namespace \n";
OS << "#endif // GET_INSTRINFO_MC_DESC\n\n";
@ -431,9 +432,9 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
OS << "struct " << ClassName << " : public TargetInstrInfo {\n"
<< " explicit " << ClassName
<< "(int CFSetupOpcode = -1, int CFDestroyOpcode = -1);\n"
<< " ~" << ClassName << "() override = default;\n"
<< " virtual ~" << ClassName << "();\n"
<< "};\n";
OS << "} // end llvm namespace \n";
OS << "} // End llvm namespace \n";
OS << "#endif // GET_INSTRINFO_HEADER\n\n";
@ -449,8 +450,9 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
<< " : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode) {\n"
<< " InitMCInstrInfo(" << TargetName << "Insts, " << TargetName
<< "InstrNameIndices, " << TargetName << "InstrNameData, "
<< NumberedInstructions.size() << ");\n}\n";
OS << "} // end llvm namespace \n";
<< NumberedInstructions.size() << ");\n}\n"
<< ClassName << "::~" << ClassName << "() {}\n";
OS << "} // End llvm namespace \n";
OS << "#endif // GET_INSTRINFO_CTOR_DTOR\n\n";
@ -594,9 +596,9 @@ void InstrInfoEmitter::emitEnums(raw_ostream &OS) {
OS << " " << Class.Name << "\t= " << Num++ << ",\n";
OS << " SCHED_LIST_END = " << SchedModels.numInstrSchedClasses() << "\n";
OS << " };\n";
OS << "} // end Sched namespace\n";
OS << "} // end " << Namespace << " namespace\n";
OS << "} // end llvm namespace \n";
OS << "} // End Sched namespace\n";
OS << "} // End " << Namespace << " namespace\n";
OS << "} // End llvm namespace \n";
OS << "#endif // GET_INSTRINFO_ENUM\n\n";
}
@ -608,4 +610,4 @@ void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) {
EmitMapTable(RK, OS);
}
} // end llvm namespace
} // End llvm namespace