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[PowerPC] PR16512 - Support TLS call sequences in the asm parser
This patch now adds support for recognizing TLS call sequences in the asm parser. This needs a new pattern BL8_TLS, which is like BL8_NOP_TLS except without nop. That pattern is used for the asm parser only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185478 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -940,8 +940,29 @@ ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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// Push the parsed operand into the list of operands
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Operands.push_back(Op);
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// Check for D-form memory operands
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if (getLexer().is(AsmToken::LParen)) {
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// Check whether this is a TLS call expression
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bool TLSCall = false;
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if (const MCSymbolRefExpr *Ref = dyn_cast<MCSymbolRefExpr>(EVal))
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TLSCall = Ref->getSymbol().getName() == "__tls_get_addr";
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if (TLSCall && getLexer().is(AsmToken::LParen)) {
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const MCExpr *TLSSym;
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Parser.Lex(); // Eat the '('.
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S = Parser.getTok().getLoc();
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if (ParseExpression(TLSSym))
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return Error(S, "invalid TLS call expression");
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if (getLexer().isNot(AsmToken::RParen))
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return Error(Parser.getTok().getLoc(), "missing ')'");
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E = Parser.getTok().getLoc();
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Parser.Lex(); // Eat the ')'.
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Op = PPCOperand::CreateExpr(TLSSym, S, E, isPPC64());
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Operands.push_back(Op);
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}
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// Otherwise, check for D-form memory operands
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if (!TLSCall && getLexer().is(AsmToken::LParen)) {
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Parser.Lex(); // Eat the '('.
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S = Parser.getTok().getLoc();
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@ -116,6 +116,9 @@ let isCall = 1, PPC970_Unit = 7, Defs = [LR8] in {
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def BL8 : IForm<18, 0, 1, (outs), (ins calltarget:$func),
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"bl $func", BrB, []>; // See Pat patterns below.
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def BL8_TLS : IForm<18, 0, 1, (outs), (ins tlscall:$func),
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"bl $func", BrB, []>;
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def BLA8 : IForm<18, 1, 1, (outs), (ins abscalltarget:$func),
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"bla $func", BrB, [(PPCcall (i64 imm:$func))]>;
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}
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@ -391,6 +391,20 @@ base:
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# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16 target 0x0
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addi 3, 3, target@got@tlsld
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# CHECK: bl __tls_get_addr(target@TLSGD) # encoding: [0b010010BB,B,B,0bBBBBBB01]
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# CHECK-NEXT: # fixup A - offset: 0, value: target@TLSGD, kind: fixup_ppc_nofixup
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# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
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# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSGD target 0x0
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# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
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bl __tls_get_addr(target@tlsgd)
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# CHECK: bl __tls_get_addr(target@TLSLD) # encoding: [0b010010BB,B,B,0bBBBBBB01]
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# CHECK-NEXT: # fixup A - offset: 0, value: target@TLSLD, kind: fixup_ppc_nofixup
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# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
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# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSLD target 0x0
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# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
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bl __tls_get_addr(target@tlsld)
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# Data relocs
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# llvm-mc does not show any "encoding" string for data, so we just check the relocs
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