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Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48578 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2400,7 +2400,9 @@ SDOperand DAGCombiner::visitSRA(SDNode *N) {
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// If the shift wouldn't be a noop, the truncated type is an actual type,
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// If the shift wouldn't be a noop, the truncated type is an actual type,
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// and the truncate is free, then proceed with the transform.
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// and the truncate is free, then proceed with the transform.
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if (ShiftAmt != 0 && TLI.isTruncateFree(VT, TruncVT)) {
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if (ShiftAmt != 0 &&
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TLI.isTypeLegal(TruncVT) &&
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TLI.isTruncateFree(VT, TruncVT)) {
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SDOperand Amt = DAG.getConstant(ShiftAmt, TLI.getShiftAmountTy());
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SDOperand Amt = DAG.getConstant(ShiftAmt, TLI.getShiftAmountTy());
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SDOperand Shift = DAG.getNode(ISD::SRL, VT, N0.getOperand(0), Amt);
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SDOperand Shift = DAG.getNode(ISD::SRL, VT, N0.getOperand(0), Amt);
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SDOperand Trunc = DAG.getNode(ISD::TRUNCATE, TruncVT, Shift);
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SDOperand Trunc = DAG.getNode(ISD::TRUNCATE, TruncVT, Shift);
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@ -5662,7 +5662,7 @@ bool X86TargetLowering::isTruncateFree(const Type *Ty1, const Type *Ty2) const {
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return false;
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return false;
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unsigned NumBits1 = Ty1->getPrimitiveSizeInBits();
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unsigned NumBits1 = Ty1->getPrimitiveSizeInBits();
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unsigned NumBits2 = Ty2->getPrimitiveSizeInBits();
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unsigned NumBits2 = Ty2->getPrimitiveSizeInBits();
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if (NumBits1 <= NumBits2 || NumBits2 < 8)
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if (NumBits1 <= NumBits2)
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return false;
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return false;
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return Subtarget->is64Bit() || NumBits1 < 64;
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return Subtarget->is64Bit() || NumBits1 < 64;
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}
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}
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@ -5673,7 +5673,7 @@ bool X86TargetLowering::isTruncateFree(MVT::ValueType VT1,
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return false;
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return false;
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unsigned NumBits1 = MVT::getSizeInBits(VT1);
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unsigned NumBits1 = MVT::getSizeInBits(VT1);
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unsigned NumBits2 = MVT::getSizeInBits(VT2);
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unsigned NumBits2 = MVT::getSizeInBits(VT2);
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if (NumBits1 <= NumBits2 || NumBits2 < 8)
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if (NumBits1 <= NumBits2)
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return false;
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return false;
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return Subtarget->is64Bit() || NumBits1 < 64;
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return Subtarget->is64Bit() || NumBits1 < 64;
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}
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}
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14
test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll
Normal file
14
test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll
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@ -0,0 +1,14 @@
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; RUN: llvm-as < %s | llc -march=x86
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define i32 @t() nounwind {
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entry:
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%tmp54 = add i32 0, 1 ; <i32> [#uses=1]
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br i1 false, label %bb71, label %bb77
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bb71: ; preds = %entry
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%tmp74 = shl i32 %tmp54, 1 ; <i32> [#uses=1]
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%tmp76 = ashr i32 %tmp74, 3 ; <i32> [#uses=1]
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br label %bb77
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bb77: ; preds = %bb71, %entry
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%payLoadSize.0 = phi i32 [ %tmp76, %bb71 ], [ 0, %entry ] ; <i32> [#uses=0]
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unreachable
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}
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