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Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, and
teach it how to recognize invariant physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83476 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1428,32 +1428,16 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
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if (!EnableAggressiveRemat)
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return false;
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// If the instruction accesses memory but the memoperands have been lost,
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// we can't analyze it.
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const TargetInstrDesc &TID = MI->getDesc();
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if ((TID.mayLoad() || TID.mayStore()) && MI->memoperands_empty())
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return false;
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// Avoid instructions obviously unsafe for remat.
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if (TID.hasUnmodeledSideEffects() || TID.isNotDuplicable())
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if (TID.hasUnmodeledSideEffects() || TID.isNotDuplicable() ||
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TID.mayStore())
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return false;
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// If the instruction accesses memory and the memory could be non-constant,
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// assume the instruction is not rematerializable.
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for (MachineInstr::mmo_iterator I = MI->memoperands_begin(),
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E = MI->memoperands_end(); I != E; ++I){
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const MachineMemOperand *MMO = *I;
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if (MMO->isVolatile() || MMO->isStore())
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return false;
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const Value *V = MMO->getValue();
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if (!V)
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return false;
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if (const PseudoSourceValue *PSV = dyn_cast<PseudoSourceValue>(V)) {
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if (!PSV->isConstant(mf_->getFrameInfo()))
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return false;
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} else if (!aa_->pointsToConstantMemory(V))
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return false;
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}
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// Avoid instructions which load from potentially varying memory.
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if (TID.mayLoad() && !MI->isInvariantLoad(aa_))
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return false;
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// If any of the registers accessed are non-constant, conservatively assume
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// the instruction is not rematerializable.
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@ -1464,8 +1448,29 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
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unsigned Reg = MO.getReg();
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if (Reg == 0)
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continue;
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if (TargetRegisterInfo::isPhysicalRegister(Reg))
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return false;
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if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
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if (MO.isUse()) {
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// If the physreg has no defs anywhere, it's just an ambient register
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// and we can freely move its uses. Alternatively, if it's allocatable,
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// it could get allocated to something with a def during allocation.
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if (!mri_->def_empty(Reg))
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return false;
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if (allocatableRegs_.test(Reg))
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return false;
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// Check for a def among the register's aliases too.
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for (const unsigned *Alias = tri_->getAliasSet(Reg); *Alias; ++Alias) {
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unsigned AliasReg = *Alias;
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if (!mri_->def_empty(AliasReg))
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return false;
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if (allocatableRegs_.test(AliasReg))
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return false;
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}
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} else {
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// A physreg def. We can't remat it.
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return false;
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}
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continue;
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}
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// Only allow one def, and that in the first operand.
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if (MO.isDef() != (i == 0))
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