From 26ebdd1e7c163f59cfd754183030855f7252d1d1 Mon Sep 17 00:00:00 2001 From: Michael Liao Date: Mon, 29 Apr 2013 22:41:29 +0000 Subject: [PATCH] Rewrite some tests with FileCHeck in X86 codegen - Revise previous patches of the same purpose by fixing *) grep | not grep semantically is not the same as CHECK: {{^.*$}} as the former will check all occurrences of while the later only check the first match. As the result, CHECK needs putting in all place where occurs. *) grep | count needs a final CHECK-NOT of the same pattern. (As 'CHECK-' is proposed for discussion, converting 'grep | count ' where N > 1 is postponed.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180742 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/2007-10-19-SpillerUnfold.ll | 6 +++++- test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll | 10 ++++++++-- test/CodeGen/X86/2008-11-06-testb.ll | 4 +++- test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll | 7 ++++--- test/CodeGen/X86/fastcc-byval.ll | 1 + test/CodeGen/X86/fastcc-sret.ll | 5 ++++- test/CodeGen/X86/fastcc3struct.ll | 4 ++-- test/CodeGen/X86/fp_load_cast_fold.ll | 8 +++++++- test/CodeGen/X86/mmx-pinsrw.ll | 4 +++- test/CodeGen/X86/peep-test-2.ll | 4 +++- test/CodeGen/X86/private-2.ll | 4 +++- test/CodeGen/X86/store-fp-constant.ll | 7 +++++-- test/CodeGen/X86/subreg-to-reg-1.ll | 5 ++++- test/CodeGen/X86/subreg-to-reg-3.ll | 4 +++- test/CodeGen/X86/switch-crit-edge-constant.ll | 6 ++++-- test/CodeGen/X86/v4f32-immediate.ll | 4 +++- test/CodeGen/X86/vec_set-B.ll | 4 +++- test/CodeGen/X86/vec_zero_cse.ll | 10 ++++++++-- test/CodeGen/X86/x86-64-frameaddr.ll | 7 ++++++- test/CodeGen/X86/x86-64-pic-3.ll | 9 ++++++--- 20 files changed, 85 insertions(+), 28 deletions(-) diff --git a/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll index d3120f3e0ef..82052b13e18 100644 --- a/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll +++ b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll @@ -1,4 +1,8 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s + +; CHECK: inc +; CHECK-NOT: PTR +; CHECK: {{$}} define signext i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) { entry: diff --git a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll index a52b36588a3..b06b249a632 100644 --- a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll +++ b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s | grep "a:" | not grep ax -; RUN: llc < %s | grep "b:" | not grep ax +; RUN: llc < %s | FileCheck %s ; PR2078 ; The clobber list says that "ax" is clobbered. Make sure that eax isn't ; allocated to the input/output register. @@ -15,6 +14,10 @@ entry: ret void } +; CHECK: a: +; CHECK-NOT: ax +; CHECK: {{$}} + define void @test2(i16* %block, i8* %pixels, i32 %line_size) nounwind { entry: %tmp1 = getelementptr i16* %block, i32 64 ; [#uses=1] @@ -22,3 +25,6 @@ entry: ret void } +; CHECK: b: +; CHECK-NOT: ax +; CHECK: {{$}} diff --git a/test/CodeGen/X86/2008-11-06-testb.ll b/test/CodeGen/X86/2008-11-06-testb.ll index f8f317c2dd4..e7caa7a1067 100644 --- a/test/CodeGen/X86/2008-11-06-testb.ll +++ b/test/CodeGen/X86/2008-11-06-testb.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin | grep testb +; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s + +; CHECK: testb ; ModuleID = '' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll index 738b5fbb704..7468acb95f1 100644 --- a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll +++ b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -relocation-model=static > %t -; RUN: grep "1: ._pv_cpu_ops+8" %t -; RUN: grep "2: ._G" %t +; RUN: llc < %s -relocation-model=static | FileCheck %s ; PR4152 +; CHECK: {{1: ._pv_cpu_ops[+]8}} +; CHECK: {{2: ._G}} + target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.6" %struct.pv_cpu_ops = type { i32, [2 x i32] } diff --git a/test/CodeGen/X86/fastcc-byval.ll b/test/CodeGen/X86/fastcc-byval.ll index 08f4564fc69..e6828e42827 100644 --- a/test/CodeGen/X86/fastcc-byval.ll +++ b/test/CodeGen/X86/fastcc-byval.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -tailcallopt=false | FileCheck %s ; CHECK: movl 8(%esp), %eax ; CHECK: movl 8(%esp), %eax +; CHECK-NOT: movl 8(%esp), %eax ; PR3122 ; rdar://6400815 diff --git a/test/CodeGen/X86/fastcc-sret.ll b/test/CodeGen/X86/fastcc-sret.ll index 05705b9431b..97814dbabdc 100644 --- a/test/CodeGen/X86/fastcc-sret.ll +++ b/test/CodeGen/X86/fastcc-sret.ll @@ -1,5 +1,4 @@ ; RUN: llc < %s -march=x86 -tailcallopt=false | FileCheck %s -; CHECK: ret{{[^4]*$}} %struct.foo = type { [4 x i32] } @@ -10,6 +9,8 @@ entry: store i32 1, i32* %tmp3, align 8 ret void } +; CHECK: bar +; CHECK: ret{{[^4]*$}} @dst = external global i32 @@ -22,3 +23,5 @@ define void @foo() nounwind { store i32 %tmp6, i32* @dst ret void } +; CHECK: foo +; CHECK: ret{{[^4]*$}} diff --git a/test/CodeGen/X86/fastcc3struct.ll b/test/CodeGen/X86/fastcc3struct.ll index e2c54ac8a13..98dc2f5a1c7 100644 --- a/test/CodeGen/X86/fastcc3struct.ll +++ b/test/CodeGen/X86/fastcc3struct.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -o %t -; RUN: FileCheck %s -input-file %t +; RUN: llc < %s -march=x86 | FileCheck %s + ; CHECK: movl {{.}}12, %eax ; CHECK: movl {{.}}24, %edx ; CHECK: movl {{.}}48, %ecx diff --git a/test/CodeGen/X86/fp_load_cast_fold.ll b/test/CodeGen/X86/fp_load_cast_fold.ll index a160ac69442..72ea12f9430 100644 --- a/test/CodeGen/X86/fp_load_cast_fold.ll +++ b/test/CodeGen/X86/fp_load_cast_fold.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep fild | not grep ESP +; RUN: llc < %s -march=x86 | FileCheck %s define double @short(i16* %P) { %V = load i16* %P ; [#uses=1] @@ -18,3 +18,9 @@ define double @long(i64* %P) { ret double %V2 } +; CHECK: long +; CHECK: fild +; CHECK-NOT: ESP +; CHECK-NOT: esp +; CHECK: {{$}} +; CHECK: ret diff --git a/test/CodeGen/X86/mmx-pinsrw.ll b/test/CodeGen/X86/mmx-pinsrw.ll index d9c7c678d1b..33dd2eb81cf 100644 --- a/test/CodeGen/X86/mmx-pinsrw.ll +++ b/test/CodeGen/X86/mmx-pinsrw.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | grep pinsr +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | FileCheck %s ; PR2562 +; CHECK: pinsr + external global i16 ; :0 [#uses=1] external global <4 x i16> ; <<4 x i16>*>:1 [#uses=2] diff --git a/test/CodeGen/X86/peep-test-2.ll b/test/CodeGen/X86/peep-test-2.ll index 27451729759..e4bafbb6ffa 100644 --- a/test/CodeGen/X86/peep-test-2.ll +++ b/test/CodeGen/X86/peep-test-2.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 | grep testl +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK: testl ; It's tempting to eliminate the testl instruction here and just use the ; EFLAGS value from the incl, however it can't be known whether the add diff --git a/test/CodeGen/X86/private-2.ll b/test/CodeGen/X86/private-2.ll index 8aa744ead8c..4413cee23b3 100644 --- a/test/CodeGen/X86/private-2.ll +++ b/test/CodeGen/X86/private-2.ll @@ -1,7 +1,9 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | grep L__ZZ20 +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s ; Quote should be outside of private prefix. ; rdar://6855766x +; CHECK: L__ZZ20 + %struct.A = type { i32*, i32 } @"_ZZ20-[Example1 whatever]E4C.91" = private constant %struct.A { i32* null, i32 1 } ; <%struct.A*> [#uses=1] diff --git a/test/CodeGen/X86/store-fp-constant.ll b/test/CodeGen/X86/store-fp-constant.ll index 206886bb608..71df8d3109e 100644 --- a/test/CodeGen/X86/store-fp-constant.ll +++ b/test/CodeGen/X86/store-fp-constant.ll @@ -1,5 +1,8 @@ -; RUN: llc < %s -march=x86 | not grep rodata -; RUN: llc < %s -march=x86 | not grep literal +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK-NOT: rodata +; CHECK-NOT: literal + ; ; Check that no FP constants in this testcase ends up in the ; constant pool. diff --git a/test/CodeGen/X86/subreg-to-reg-1.ll b/test/CodeGen/X86/subreg-to-reg-1.ll index 4f31ab5a922..2931bab0cdd 100644 --- a/test/CodeGen/X86/subreg-to-reg-1.ll +++ b/test/CodeGen/X86/subreg-to-reg-1.ll @@ -1,4 +1,7 @@ -; RUN: llc < %s -march=x86-64 | grep "leal .*), %e.*" | count 1 +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; CHECK: {{leal .*[)], %e.*}} +; CHECK-NOT: {{leal .*[)], %e.*}} ; Don't eliminate or coalesce away the explicit zero-extension! ; This is currently using an leal because of a 3-addressification detail, diff --git a/test/CodeGen/X86/subreg-to-reg-3.ll b/test/CodeGen/X86/subreg-to-reg-3.ll index 931ae758ac5..80ab1a2e249 100644 --- a/test/CodeGen/X86/subreg-to-reg-3.ll +++ b/test/CodeGen/X86/subreg-to-reg-3.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86-64 | grep imull +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; CHECK: imull ; Don't eliminate or coalesce away the explicit zero-extension! diff --git a/test/CodeGen/X86/switch-crit-edge-constant.ll b/test/CodeGen/X86/switch-crit-edge-constant.ll index 1f2ab0dbcbe..18f987e7221 100644 --- a/test/CodeGen/X86/switch-crit-edge-constant.ll +++ b/test/CodeGen/X86/switch-crit-edge-constant.ll @@ -1,6 +1,8 @@ ; PR925 -; RUN: llc < %s -march=x86 | \ -; RUN: grep mov.*str1 | count 1 +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK: {{mov.*str1}} +; CHECK-NOT: {{mov.*str1}} target datalayout = "e-p:32:32" target triple = "i686-apple-darwin8.7.2" diff --git a/test/CodeGen/X86/v4f32-immediate.ll b/test/CodeGen/X86/v4f32-immediate.ll index b5ebaa74bd0..68d20a04ecf 100644 --- a/test/CodeGen/X86/v4f32-immediate.ll +++ b/test/CodeGen/X86/v4f32-immediate.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse | grep movaps +; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s + +; CHECK: movaps define <4 x float> @foo() { ret <4 x float> diff --git a/test/CodeGen/X86/vec_set-B.ll b/test/CodeGen/X86/vec_set-B.ll index f5b3e8baa33..5578ecaf000 100644 --- a/test/CodeGen/X86/vec_set-B.ll +++ b/test/CodeGen/X86/vec_set-B.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movaps +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep esp | count 2 +; CHECK-NOT: movaps + ; These should both generate something like this: ;_test3: ; movl $1234567, %eax diff --git a/test/CodeGen/X86/vec_zero_cse.ll b/test/CodeGen/X86/vec_zero_cse.ll index 41ea0245ed8..bda3feff2b0 100644 --- a/test/CodeGen/X86/vec_zero_cse.ll +++ b/test/CodeGen/X86/vec_zero_cse.ll @@ -1,7 +1,13 @@ -; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep xorps | count 1 -; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 1 +; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | FileCheck %s +; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | FileCheck -check-prefix CHECK2 %s ; 64-bit stores here do not use MMX. +; CHECK: xorps +; CHECK-NOT: xorps + +; CHECK2: pcmpeqd +; CHECK2-NOT: pcmpeqd + @M1 = external global <1 x i64> @M2 = external global <2 x i32> diff --git a/test/CodeGen/X86/x86-64-frameaddr.ll b/test/CodeGen/X86/x86-64-frameaddr.ll index 57163d3c683..7d36a7af6aa 100644 --- a/test/CodeGen/X86/x86-64-frameaddr.ll +++ b/test/CodeGen/X86/x86-64-frameaddr.ll @@ -1,4 +1,9 @@ -; RUN: llc < %s -march=x86-64 | grep movq | grep rbp +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; CHECK: stack_end_address +; CHECK: {{movq.+rbp.*$}} +; CHECK: {{movq.+rbp.*$}} +; CHECK: ret define i64* @stack_end_address() nounwind { entry: diff --git a/test/CodeGen/X86/x86-64-pic-3.ll b/test/CodeGen/X86/x86-64-pic-3.ll index ba933788a3a..1b0ddc6fe5a 100644 --- a/test/CodeGen/X86/x86-64-pic-3.ll +++ b/test/CodeGen/X86/x86-64-pic-3.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -; RUN: grep "callq f" %t1 -; RUN: not grep "callq f@PLT" %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s + + +; CHECK-NOT: {{callq f@PLT}} +; CHECK: {{callq f}} +; CHECK-NOT: {{callq f@PLT}} define void @g() { entry: