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Add support for scalarizing ctlz_zero_undef

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Fix the missing case in ScalarizeVectorResult() that was exposed with
libclcore.bc in Android.

Differential Revision: http://reviews.llvm.org/D4645


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214266 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Petar Jovanovic 2014-07-30 00:44:03 +00:00
parent 601bb093ef
commit 278da370ce
2 changed files with 20 additions and 0 deletions
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1
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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@ -69,6 +69,7 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
case ISD::ANY_EXTEND:
case ISD::BSWAP:
case ISD::CTLZ:
case ISD::CTLZ_ZERO_UNDEF:
case ISD::CTPOP:
case ISD::CTTZ:
case ISD::FABS:

19
test/CodeGen/Mips/ctlz-v.ll Normal file
View File

@ -0,0 +1,19 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32
; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)
define <2 x i32> @ctlzv2i32(<2 x i32> %x) {
entry:
; MIPS32: clz $2, $4
; MIPS32: jr $ra
; MIPS32: clz $3, $5
; MIPS64: clz $2, $4
; MIPS64: jr $ra
; MIPS64: clz $3, $5
%ret = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 true)
ret <2 x i32> %ret
}