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[AVX-512] Add separate ISD opcodes for each form of CVT instructions. Don't reuse non-X86 ISD opcodes with extra X86 specific arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282230 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
parent
cfb1f68fd0
commit
27e9902850
@ -22665,15 +22665,23 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
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case X86ISD::MULHRS: return "X86ISD::MULHRS";
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case X86ISD::SINT_TO_FP_RND: return "X86ISD::SINT_TO_FP_RND";
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case X86ISD::UINT_TO_FP_RND: return "X86ISD::UINT_TO_FP_RND";
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case X86ISD::FP_TO_SINT_RND: return "X86ISD::FP_TO_SINT_RND";
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case X86ISD::FP_TO_UINT_RND: return "X86ISD::FP_TO_UINT_RND";
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case X86ISD::CVTTP2SI_RND: return "X86ISD::CVTTP2SI_RND";
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case X86ISD::CVTTP2UI_RND: return "X86ISD::CVTTP2UI_RND";
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case X86ISD::CVTTS2SI_RND: return "X86ISD::CVTTS2SI_RND";
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case X86ISD::CVTTS2UI_RND: return "X86ISD::CVTTS2UI_RND";
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case X86ISD::VFPCLASS: return "X86ISD::VFPCLASS";
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case X86ISD::VFPCLASSS: return "X86ISD::VFPCLASSS";
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case X86ISD::MULTISHIFT: return "X86ISD::MULTISHIFT";
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case X86ISD::SCALAR_FP_TO_SINT_RND: return "X86ISD::SCALAR_FP_TO_SINT_RND";
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case X86ISD::SCALAR_FP_TO_UINT_RND: return "X86ISD::SCALAR_FP_TO_UINT_RND";
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case X86ISD::SCALAR_SINT_TO_FP_RND: return "X86ISD::SCALAR_SINT_TO_FP_RND";
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case X86ISD::SCALAR_UINT_TO_FP_RND: return "X86ISD::SCALAR_UINT_TO_FP_RND";
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case X86ISD::CVTPS2PH: return "X86ISD::CVTPS2PH";
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case X86ISD::CVTPH2PS: return "X86ISD::CVTPH2PS";
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case X86ISD::CVTP2SI: return "X86ISD::CVTP2SI";
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case X86ISD::CVTP2UI: return "X86ISD::CVTP2UI";
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case X86ISD::CVTP2SI_RND: return "X86ISD::CVTP2SI_RND";
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case X86ISD::CVTP2UI_RND: return "X86ISD::CVTP2UI_RND";
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case X86ISD::CVTS2SI_RND: return "X86ISD::CVTS2SI_RND";
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case X86ISD::CVTS2UI_RND: return "X86ISD::CVTS2UI_RND";
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}
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return nullptr;
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}
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@ -494,15 +494,19 @@ namespace llvm {
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COMPRESS,
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EXPAND,
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// Convert Unsigned/Integer to Scalar Floating-Point Value
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// with rounding mode.
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SINT_TO_FP_RND,
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UINT_TO_FP_RND,
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// Convert Unsigned/Integer to Floating-Point Value with rounding mode.
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SINT_TO_FP_RND, UINT_TO_FP_RND,
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SCALAR_SINT_TO_FP_RND, SCALAR_UINT_TO_FP_RND,
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// Vector float/double to signed/unsigned integer.
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FP_TO_SINT_RND, FP_TO_UINT_RND,
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CVTP2SI, CVTP2UI, CVTP2SI_RND, CVTP2UI_RND,
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// Scalar float/double to signed/unsigned integer.
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SCALAR_FP_TO_SINT_RND, SCALAR_FP_TO_UINT_RND,
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CVTS2SI_RND, CVTS2UI_RND,
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// Vector float/double to signed/unsigned integer with truncation.
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CVTTP2SI_RND, CVTTP2UI_RND,
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// Scalar float/double to signed/unsigned integer with truncation.
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CVTTS2SI_RND, CVTTS2UI_RND,
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// Save xmm argument registers to the stack, according to %al. An operator
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// is needed so that this can be expanded with control flow.
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@ -6111,19 +6111,19 @@ defm VCVTDQ2PS : avx512_cvtdq2ps<0x5B, "vcvtdq2ps", sint_to_fp,
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PS, EVEX_CD8<32, CD8VF>;
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defm VCVTTPS2DQ : avx512_cvttps2dq<0x5B, "vcvttps2dq", fp_to_sint,
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X86VFpToSintRnd>,
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X86cvttp2siRnd>,
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XS, EVEX_CD8<32, CD8VF>;
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defm VCVTTPD2DQ : avx512_cvttpd2dq<0xE6, "vcvttpd2dq", fp_to_sint,
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X86VFpToSintRnd>,
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X86cvttp2siRnd>,
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PD, VEX_W, EVEX_CD8<64, CD8VF>;
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defm VCVTTPS2UDQ : avx512_cvttps2dq<0x78, "vcvttps2udq", fp_to_uint,
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X86VFpToUintRnd>, PS,
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X86cvttp2uiRnd>, PS,
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EVEX_CD8<32, CD8VF>;
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defm VCVTTPD2UDQ : avx512_cvttpd2dq<0x78, "vcvttpd2udq", fp_to_uint,
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X86VFpToUintRnd>, PS, VEX_W,
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X86cvttp2uiRnd>, PS, VEX_W,
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EVEX_CD8<64, CD8VF>;
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defm VCVTUDQ2PD : avx512_cvtdq2pd<0x7A, "vcvtudq2pd", uint_to_fp, X86cvtudq2pd>,
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@ -6162,18 +6162,18 @@ defm VCVTPS2UQQ : avx512_cvtps2qq<0x79, "vcvtps2uqq", X86cvtp2UInt,
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X86cvtp2UIntRnd>, PD, EVEX_CD8<32, CD8VH>;
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defm VCVTTPD2QQ : avx512_cvttpd2qq<0x7A, "vcvttpd2qq", fp_to_sint,
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X86VFpToSintRnd>, VEX_W,
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X86cvttp2siRnd>, VEX_W,
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PD, EVEX_CD8<64, CD8VF>;
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defm VCVTTPS2QQ : avx512_cvttps2qq<0x7A, "vcvttps2qq", fp_to_sint,
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X86VFpToSintRnd>, PD, EVEX_CD8<32, CD8VH>;
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X86cvttp2siRnd>, PD, EVEX_CD8<32, CD8VH>;
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defm VCVTTPD2UQQ : avx512_cvttpd2qq<0x78, "vcvttpd2uqq", fp_to_uint,
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X86VFpToUintRnd>, VEX_W,
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X86cvttp2uiRnd>, VEX_W,
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PD, EVEX_CD8<64, CD8VF>;
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defm VCVTTPS2UQQ : avx512_cvttps2qq<0x78, "vcvttps2uqq", fp_to_uint,
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X86VFpToUintRnd>, PD, EVEX_CD8<32, CD8VH>;
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X86cvttp2uiRnd>, PD, EVEX_CD8<32, CD8VH>;
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defm VCVTQQ2PD : avx512_cvtqq2pd<0xE6, "vcvtqq2pd", sint_to_fp,
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X86VSintToFpRnd>, VEX_W, XS, EVEX_CD8<64, CD8VF>;
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@ -532,31 +532,31 @@ def SDTVintToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
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SDTCisVT<2, i32>]>;
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// Scalar
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def X86SintToFpRnd : SDNode<"X86ISD::SINT_TO_FP_RND", SDTintToFPRound>;
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def X86UintToFpRnd : SDNode<"X86ISD::UINT_TO_FP_RND", SDTintToFPRound>;
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def X86SintToFpRnd : SDNode<"X86ISD::SCALAR_SINT_TO_FP_RND", SDTintToFPRound>;
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def X86UintToFpRnd : SDNode<"X86ISD::SCALAR_UINT_TO_FP_RND", SDTintToFPRound>;
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def X86cvtts2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTSFloatToIntRnd>;
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def X86cvtts2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTSFloatToIntRnd>;
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def X86cvtts2IntRnd : SDNode<"X86ISD::CVTTS2SI_RND", SDTSFloatToIntRnd>;
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def X86cvtts2UIntRnd : SDNode<"X86ISD::CVTTS2UI_RND", SDTSFloatToIntRnd>;
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def X86cvts2si : SDNode<"X86ISD::SCALAR_FP_TO_SINT_RND", SDTSFloatToIntRnd>;
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def X86cvts2usi : SDNode<"X86ISD::SCALAR_FP_TO_UINT_RND", SDTSFloatToIntRnd>;
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def X86cvts2si : SDNode<"X86ISD::CVTS2SI_RND", SDTSFloatToIntRnd>;
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def X86cvts2usi : SDNode<"X86ISD::CVTS2UI_RND", SDTSFloatToIntRnd>;
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// Vector with rounding mode
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// cvtt fp-to-int staff
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def X86VFpToSintRnd : SDNode<"ISD::FP_TO_SINT", SDTFloatToIntRnd>;
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def X86VFpToUintRnd : SDNode<"ISD::FP_TO_UINT", SDTFloatToIntRnd>;
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def X86cvttp2siRnd : SDNode<"X86ISD::CVTTP2SI_RND", SDTFloatToIntRnd>;
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def X86cvttp2uiRnd : SDNode<"X86ISD::CVTTP2UI_RND", SDTFloatToIntRnd>;
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def X86VSintToFpRnd : SDNode<"ISD::SINT_TO_FP", SDTVintToFPRound>;
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def X86VUintToFpRnd : SDNode<"ISD::UINT_TO_FP", SDTVintToFPRound>;
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def X86VSintToFpRnd : SDNode<"X86ISD::SINT_TO_FP_RND", SDTVintToFPRound>;
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def X86VUintToFpRnd : SDNode<"X86ISD::UINT_TO_FP_RND", SDTVintToFPRound>;
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// cvt fp-to-int staff
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def X86cvtp2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToIntRnd>;
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def X86cvtp2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToIntRnd>;
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def X86cvtp2IntRnd : SDNode<"X86ISD::CVTP2SI_RND", SDTFloatToIntRnd>;
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def X86cvtp2UIntRnd : SDNode<"X86ISD::CVTP2UI_RND", SDTFloatToIntRnd>;
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// Vector without rounding mode
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def X86cvtp2Int : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToInt>;
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def X86cvtp2UInt : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToInt>;
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def X86cvtp2Int : SDNode<"X86ISD::CVTP2SI", SDTFloatToInt>;
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def X86cvtp2UInt : SDNode<"X86ISD::CVTP2UI", SDTFloatToInt>;
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def X86cvtph2ps : SDNode<"X86ISD::CVTPH2PS",
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SDTypeProfile<1, 2, [SDTCVecEltisVT<0, f32>,
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@ -354,20 +354,20 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(avx512_cvtq2mask_128, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
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X86_INTRINSIC_DATA(avx512_cvtq2mask_256, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
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X86_INTRINSIC_DATA(avx512_cvtq2mask_512, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
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X86_INTRINSIC_DATA(avx512_cvtsi2sd64, INTR_TYPE_3OP, X86ISD::SINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtsi2ss32, INTR_TYPE_3OP, X86ISD::SINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtsi2ss64, INTR_TYPE_3OP, X86ISD::SINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttsd2si, INTR_TYPE_2OP, X86ISD::FP_TO_SINT_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttsd2si64, INTR_TYPE_2OP, X86ISD::FP_TO_SINT_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttsd2usi, INTR_TYPE_2OP, X86ISD::FP_TO_UINT_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttsd2usi64, INTR_TYPE_2OP, X86ISD::FP_TO_UINT_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttss2si, INTR_TYPE_2OP, X86ISD::FP_TO_SINT_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttss2si64, INTR_TYPE_2OP, X86ISD::FP_TO_SINT_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttss2usi, INTR_TYPE_2OP, X86ISD::FP_TO_UINT_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttss2usi64, INTR_TYPE_2OP, X86ISD::FP_TO_UINT_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtusi2ss, INTR_TYPE_3OP, X86ISD::UINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtusi642sd, INTR_TYPE_3OP, X86ISD::UINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtusi642ss, INTR_TYPE_3OP, X86ISD::UINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtsi2sd64, INTR_TYPE_3OP, X86ISD::SCALAR_SINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtsi2ss32, INTR_TYPE_3OP, X86ISD::SCALAR_SINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtsi2ss64, INTR_TYPE_3OP, X86ISD::SCALAR_SINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttsd2si, INTR_TYPE_2OP, X86ISD::CVTTS2SI_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttsd2si64, INTR_TYPE_2OP, X86ISD::CVTTS2SI_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttsd2usi, INTR_TYPE_2OP, X86ISD::CVTTS2UI_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttsd2usi64, INTR_TYPE_2OP, X86ISD::CVTTS2UI_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttss2si, INTR_TYPE_2OP, X86ISD::CVTTS2SI_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttss2si64, INTR_TYPE_2OP, X86ISD::CVTTS2SI_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttss2usi, INTR_TYPE_2OP, X86ISD::CVTTS2UI_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvttss2usi64, INTR_TYPE_2OP, X86ISD::CVTTS2UI_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtusi2ss, INTR_TYPE_3OP, X86ISD::SCALAR_UINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtusi642sd, INTR_TYPE_3OP, X86ISD::SCALAR_UINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtusi642ss, INTR_TYPE_3OP, X86ISD::SCALAR_UINT_TO_FP_RND, 0),
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X86_INTRINSIC_DATA(avx512_cvtw2mask_128, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
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X86_INTRINSIC_DATA(avx512_cvtw2mask_256, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
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X86_INTRINSIC_DATA(avx512_cvtw2mask_512, CONVERT_TO_MASK, X86ISD::CVT2MASK, 0),
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@ -490,13 +490,13 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(avx512_mask_cvtdq2ps_256, INTR_TYPE_1OP_MASK,
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ISD::SINT_TO_FP, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtdq2ps_512, INTR_TYPE_1OP_MASK,
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ISD::SINT_TO_FP, ISD::SINT_TO_FP), //er
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ISD::SINT_TO_FP, X86ISD::SINT_TO_FP_RND), //er
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2dq_128, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_SINT_RND, 0),
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X86ISD::CVTP2SI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2dq_256, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_SINT_RND, 0),
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X86ISD::CVTP2SI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2dq_512, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_SINT_RND, X86ISD::FP_TO_SINT_RND),
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X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2ps, INTR_TYPE_1OP_MASK,
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X86ISD::VFPROUND, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2ps_256, CVTPD2PS,
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@ -504,29 +504,29 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2ps_512, CVTPD2PS,
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ISD::FP_ROUND, X86ISD::VFPROUND),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2qq_128, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_SINT_RND, 0),
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X86ISD::CVTP2SI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2qq_256, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_SINT_RND, 0),
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X86ISD::CVTP2SI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2qq_512, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_SINT_RND, X86ISD::FP_TO_SINT_RND),
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X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2udq_128, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_UINT_RND, 0),
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X86ISD::CVTP2UI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2udq_256, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_UINT_RND, 0),
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X86ISD::CVTP2UI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2udq_512, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_UINT_RND, X86ISD::FP_TO_UINT_RND),
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X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2uqq_128, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_UINT_RND, 0),
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X86ISD::CVTP2UI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2uqq_256, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_UINT_RND, 0),
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X86ISD::CVTP2UI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtpd2uqq_512, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_UINT_RND, X86ISD::FP_TO_UINT_RND),
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X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
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X86_INTRINSIC_DATA(avx512_mask_cvtps2dq_128, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_SINT_RND, 0),
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X86ISD::CVTP2SI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtps2dq_256, INTR_TYPE_1OP_MASK,
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X86ISD::FP_TO_SINT_RND, 0),
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X86ISD::CVTP2SI, 0),
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X86_INTRINSIC_DATA(avx512_mask_cvtps2dq_512, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_SINT_RND, X86ISD::FP_TO_SINT_RND),
|
||||
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2pd_128, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::VFPEXT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2pd_256, INTR_TYPE_1OP_MASK,
|
||||
@ -534,35 +534,35 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2pd_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_EXTEND, X86ISD::VFPEXT),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2qq_128, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_SINT_RND, 0),
|
||||
X86ISD::CVTP2SI, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2qq_256, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_SINT_RND, 0),
|
||||
X86ISD::CVTP2SI, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2qq_512, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_SINT_RND, X86ISD::FP_TO_SINT_RND),
|
||||
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2udq_128, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_UINT_RND, 0),
|
||||
X86ISD::CVTP2UI, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2udq_256, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_UINT_RND, 0),
|
||||
X86ISD::CVTP2UI, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2udq_512, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_UINT_RND, X86ISD::FP_TO_UINT_RND),
|
||||
X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2uqq_128, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_UINT_RND, 0),
|
||||
X86ISD::CVTP2UI, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2uqq_256, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_UINT_RND, 0),
|
||||
X86ISD::CVTP2UI, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtps2uqq_512, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::FP_TO_UINT_RND, X86ISD::FP_TO_UINT_RND),
|
||||
X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtqq2pd_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::SINT_TO_FP, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtqq2pd_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::SINT_TO_FP, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtqq2pd_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::SINT_TO_FP, ISD::SINT_TO_FP),
|
||||
ISD::SINT_TO_FP, X86ISD::SINT_TO_FP_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtqq2ps_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::SINT_TO_FP, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtqq2ps_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::SINT_TO_FP, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtqq2ps_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::SINT_TO_FP, ISD::SINT_TO_FP),
|
||||
ISD::SINT_TO_FP, X86ISD::SINT_TO_FP_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtsd2ss_round, INTR_TYPE_SCALAR_MASK_RM,
|
||||
X86ISD::VFPROUND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtss2sd_round, INTR_TYPE_SCALAR_MASK_RM,
|
||||
@ -572,49 +572,49 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2dq_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2dq_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, ISD::FP_TO_SINT),
|
||||
ISD::FP_TO_SINT, X86ISD::CVTTP2SI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2qq_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2qq_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2qq_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, ISD::FP_TO_SINT),
|
||||
ISD::FP_TO_SINT, X86ISD::CVTTP2SI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2udq_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2udq_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2udq_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, ISD::FP_TO_UINT),
|
||||
ISD::FP_TO_UINT, X86ISD::CVTTP2UI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2uqq_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2uqq_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttpd2uqq_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, ISD::FP_TO_UINT),
|
||||
ISD::FP_TO_UINT, X86ISD::CVTTP2UI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2dq_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2dq_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2dq_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, ISD::FP_TO_SINT),
|
||||
ISD::FP_TO_SINT, X86ISD::CVTTP2SI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2qq_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2qq_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2qq_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_SINT, ISD::FP_TO_SINT),
|
||||
ISD::FP_TO_SINT, X86ISD::CVTTP2SI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2udq_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2udq_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2udq_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, ISD::FP_TO_UINT),
|
||||
ISD::FP_TO_UINT, X86ISD::CVTTP2UI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2uqq_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2uqq_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvttps2uqq_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::FP_TO_UINT, ISD::FP_TO_UINT),
|
||||
ISD::FP_TO_UINT, X86ISD::CVTTP2UI_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtudq2pd_128, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::CVTUDQ2PD, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtudq2pd_256, INTR_TYPE_1OP_MASK,
|
||||
@ -626,19 +626,19 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtudq2ps_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::UINT_TO_FP, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtudq2ps_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::UINT_TO_FP, ISD::UINT_TO_FP),
|
||||
ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::UINT_TO_FP, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::UINT_TO_FP, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::UINT_TO_FP, ISD::UINT_TO_FP),
|
||||
ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_128, INTR_TYPE_1OP_MASK,
|
||||
ISD::UINT_TO_FP, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_256, INTR_TYPE_1OP_MASK,
|
||||
ISD::UINT_TO_FP, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_512, INTR_TYPE_1OP_MASK,
|
||||
ISD::UINT_TO_FP, ISD::UINT_TO_FP),
|
||||
ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_dbpsadbw_128, INTR_TYPE_3OP_IMM8_MASK,
|
||||
X86ISD::DBPSADBW, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_dbpsadbw_256, INTR_TYPE_3OP_IMM8_MASK,
|
||||
@ -1734,22 +1734,14 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
|
||||
X86_INTRINSIC_DATA(avx512_rsqrt28_ss, INTR_TYPE_SCALAR_MASK_RM,X86ISD::RSQRT28S, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcomi_sd, COMI_RM, X86ISD::COMI, X86ISD::UCOMI),
|
||||
X86_INTRINSIC_DATA(avx512_vcomi_ss, COMI_RM, X86ISD::COMI, X86ISD::UCOMI),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtsd2si32, INTR_TYPE_2OP,
|
||||
X86ISD::SCALAR_FP_TO_SINT_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtsd2si64, INTR_TYPE_2OP,
|
||||
X86ISD::SCALAR_FP_TO_SINT_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtsd2usi32, INTR_TYPE_2OP,
|
||||
X86ISD::SCALAR_FP_TO_UINT_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtsd2usi64, INTR_TYPE_2OP,
|
||||
X86ISD::SCALAR_FP_TO_UINT_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtss2si32, INTR_TYPE_2OP,
|
||||
X86ISD::SCALAR_FP_TO_SINT_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtss2si64, INTR_TYPE_2OP,
|
||||
X86ISD::SCALAR_FP_TO_SINT_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtss2usi32, INTR_TYPE_2OP,
|
||||
X86ISD::SCALAR_FP_TO_UINT_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtss2usi64, INTR_TYPE_2OP,
|
||||
X86ISD::SCALAR_FP_TO_UINT_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtsd2si32, INTR_TYPE_2OP, X86ISD::CVTS2SI_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtsd2si64, INTR_TYPE_2OP, X86ISD::CVTS2SI_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtsd2usi32, INTR_TYPE_2OP, X86ISD::CVTS2UI_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtsd2usi64, INTR_TYPE_2OP, X86ISD::CVTS2UI_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtss2si32, INTR_TYPE_2OP, X86ISD::CVTS2SI_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtss2si64, INTR_TYPE_2OP, X86ISD::CVTS2SI_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtss2usi32, INTR_TYPE_2OP, X86ISD::CVTS2UI_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_vcvtss2usi64, INTR_TYPE_2OP, X86ISD::CVTS2UI_RND, 0),
|
||||
X86_INTRINSIC_DATA(fma_vfmadd_pd, INTR_TYPE_3OP, X86ISD::FMADD, 0),
|
||||
X86_INTRINSIC_DATA(fma_vfmadd_pd_256, INTR_TYPE_3OP, X86ISD::FMADD, 0),
|
||||
X86_INTRINSIC_DATA(fma_vfmadd_ps, INTR_TYPE_3OP, X86ISD::FMADD, 0),
|
||||
|
||||
Loading…
Reference in New Issue
Block a user