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[SparcInstPrinter] Use the subtarget that is passed to the print function

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instead of the one passed to the constructor.

Unfortunately, I don't have a test case for this change. In order to test my
change, I will have to run the code after line 90 in printSparcAliasInstr. I
couldn't make that happen because printAliasInstr would always handle the
printing of fcmp instructions that the code after line 90 is supposed to handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233471 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2015-03-28 04:03:51 +00:00
parent 74381e237b
commit 2841bc6858
3 changed files with 47 additions and 34 deletions
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43
lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp
View File

@ -34,7 +34,7 @@ namespace Sparc {
#define PRINT_ALIAS_INSTR
#include "SparcGenAsmWriter.inc"
bool SparcInstPrinter::isV9() const {
bool SparcInstPrinter::isV9(const MCSubtargetInfo &STI) const {
return (STI.getFeatureBits() & Sparc::FeatureV9) != 0;
}
@ -45,13 +45,14 @@ void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const
void SparcInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot, const MCSubtargetInfo &STI) {
if (!printAliasInstr(MI, O) && !printSparcAliasInstr(MI, O))
printInstruction(MI, O);
if (!printAliasInstr(MI, STI, O) && !printSparcAliasInstr(MI, STI, O))
printInstruction(MI, STI, O);
printAnnotation(O, Annot);
}
bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O)
{
bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI,
const MCSubtargetInfo &STI,
raw_ostream &O) {
switch (MI->getOpcode()) {
default: return false;
case SP::JMPLrr:
@ -71,16 +72,16 @@ bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O)
case SP::O7: O << "\tretl"; return true;
}
}
O << "\tjmp "; printMemOperand(MI, 1, O);
O << "\tjmp "; printMemOperand(MI, 1, STI, O);
return true;
case SP::O7: // call $addr
O << "\tcall "; printMemOperand(MI, 1, O);
O << "\tcall "; printMemOperand(MI, 1, STI, O);
return true;
}
}
case SP::V9FCMPS: case SP::V9FCMPD: case SP::V9FCMPQ:
case SP::V9FCMPES: case SP::V9FCMPED: case SP::V9FCMPEQ: {
if (isV9()
if (isV9(STI)
|| (MI->getNumOperands() != 3)
|| (!MI->getOperand(0).isReg())
|| (MI->getOperand(0).getReg() != SP::FCC0))
@ -95,17 +96,17 @@ bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O)
case SP::V9FCMPED: O << "\tfcmped "; break;
case SP::V9FCMPEQ: O << "\tfcmpeq "; break;
}
printOperand(MI, 1, O);
printOperand(MI, 1, STI, O);
O << ", ";
printOperand(MI, 2, O);
printOperand(MI, 2, STI, O);
return true;
}
}
}
void SparcInstPrinter::printOperand(const MCInst *MI, int opNum,
raw_ostream &O)
{
const MCSubtargetInfo &STI,
raw_ostream &O) {
const MCOperand &MO = MI->getOperand (opNum);
if (MO.isReg()) {
@ -123,14 +124,14 @@ void SparcInstPrinter::printOperand(const MCInst *MI, int opNum,
}
void SparcInstPrinter::printMemOperand(const MCInst *MI, int opNum,
raw_ostream &O, const char *Modifier)
{
printOperand(MI, opNum, O);
const MCSubtargetInfo &STI,
raw_ostream &O, const char *Modifier) {
printOperand(MI, opNum, STI, O);
// If this is an ADD operand, emit it like normal operands.
if (Modifier && !strcmp(Modifier, "arith")) {
O << ", ";
printOperand(MI, opNum+1, O);
printOperand(MI, opNum+1, STI, O);
return;
}
const MCOperand &MO = MI->getOperand(opNum+1);
@ -142,12 +143,12 @@ void SparcInstPrinter::printMemOperand(const MCInst *MI, int opNum,
O << "+";
printOperand(MI, opNum+1, O);
printOperand(MI, opNum+1, STI, O);
}
void SparcInstPrinter::printCCOperand(const MCInst *MI, int opNum,
raw_ostream &O)
{
const MCSubtargetInfo &STI,
raw_ostream &O) {
int CC = (int)MI->getOperand(opNum).getImm();
switch (MI->getOpcode()) {
default: break;
@ -170,8 +171,8 @@ void SparcInstPrinter::printCCOperand(const MCInst *MI, int opNum,
}
bool SparcInstPrinter::printGetPCX(const MCInst *MI, unsigned opNum,
raw_ostream &O)
{
const MCSubtargetInfo &STI,
raw_ostream &O) {
llvm_unreachable("FIXME: Implement SparcInstPrinter::printGetPCX.");
return true;
}

31
lib/Target/Sparc/InstPrinter/SparcInstPrinter.h
View File

@ -22,33 +22,38 @@ namespace llvm {
class MCOperand;
class SparcInstPrinter : public MCInstPrinter {
const MCSubtargetInfo &STI;
public:
SparcInstPrinter(const MCAsmInfo &MAI,
const MCInstrInfo &MII,
const MCRegisterInfo &MRI,
const MCSubtargetInfo &sti)
: MCInstPrinter(MAI, MII, MRI), STI(sti) {}
: MCInstPrinter(MAI, MII, MRI) {}
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
const MCSubtargetInfo &STI) override;
bool printSparcAliasInstr(const MCInst *MI, raw_ostream &OS);
bool isV9() const;
bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
raw_ostream &OS);
bool isV9(const MCSubtargetInfo &STI) const;
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI, raw_ostream &O);
bool printAliasInstr(const MCInst *MI, raw_ostream &O);
void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
raw_ostream &O);
bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
raw_ostream &O);
void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
unsigned PrintMethodIdx, raw_ostream &O);
unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &O);
static const char *getRegisterName(unsigned RegNo);
void printOperand(const MCInst *MI, int opNum, raw_ostream &OS);
void printMemOperand(const MCInst *MI, int opNum, raw_ostream &OS,
const char *Modifier = nullptr);
void printCCOperand(const MCInst *MI, int opNum, raw_ostream &OS);
bool printGetPCX(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
raw_ostream &OS);
void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
raw_ostream &OS, const char *Modifier = nullptr);
void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
raw_ostream &OS);
bool printGetPCX(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &OS);
};
} // end namespace llvm

7
lib/Target/Sparc/Sparc.td
View File

@ -92,8 +92,15 @@ def : Proc<"niagara4", [FeatureV9, FeatureV8Deprecated, UsePopc,
// Declare the target which we are implementing
//===----------------------------------------------------------------------===//
def SparcAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
int PassSubtarget = 1;
int Variant = 0;
}
def Sparc : Target {
// Pull in Instruction Info:
let InstructionSet = SparcInstrInfo;
let AssemblyParsers = [SparcAsmParser];
let AssemblyWriters = [SparcAsmWriter];
}